Texas Instruments TNETE110A User Manual

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ThunderLAN

TNETE100A, TNETE110A, TNETE211

Programmer's

Guide

October 1996

Network Business Products

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Printed in U.S.A., October 1996

SPWU013A

 

 

 

L411001±9761 revision A

 

 

 

 

 

 

 

 

 

 

 

 

ThunderLANt

Programmer's Guide

TNETE100A, TNETE110A, TNETE211

Literature Number: SPWU013A

Manufacturing Part Number: L411001-9761revision A

October 1996

Running TitleÐAttribute Reference

IMPORTANT NOTICE

Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current.

TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.

Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (ªCritical Applicationsº).

TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORTAPPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS.

Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office.

In order to minimize risks associated with the customer's applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used.

Copyright 1996, Texas Instruments Incorporated

ii

Preface

Read This First

About This Manual

The ThunderLAN Programmer's Guide assists you in using the following implementations of ThunderLAN networking hardware:

-TNETE100A Ethernett controller

-TNETE110A Ethernet controller

-TNETE211 100 VG-AnyLANphysical media interface (PMI)

How to Use This Manual

The goal of this book is to assist you in the development of drivers for the ThunderLAN controllers. This document contains the following chapters:

-Chapter 1, ThunderLAN Overview, describes some Texas Instruments-specifichardware features. These include the enhanced media independent interface (MII), which passes interrupts from an attached physical interface (PHY) to the host.

-Chapter 2, ThunderLAN Registers, shows how to access the various ThunderLAN registers and how to use these registers to access external devices attached to ThunderLAN.

-Chapter 3, Initializing and Resetting, discusses how to initialize and reset the controller and the attached PHYs.

-Chapter 4, Interrupt Handling, describes what happens when interrupts occur and how to correct failure conditions.

-Chapter 5, List Structures, describes how to pass data to ThunderLAN using a system of linked list structures.

-Chapter 6, Transmitting and Receiving Frames, explains the format and procedure for transmitting and receiving, as well as the linked list structure required.

-Chapter 7, Physical Interface, discusses the features of ThunderLAN which support IEEE 802.3- and 802.12-compliantdevices.

iii

Notational Conventions

Notational Conventions

This document uses the following conventions:

-Program listings, program examples, and interactive displays are shown in a special font. Examples use a bold version of the special font for emphasis. Here is a sample program listing:

11

0005

0001

.field

1,

2

12

0005

0003

.field

3,

4

13

0005

0006

.field

6,

3

14

0006

 

.even

 

 

-A lower case `x' in a number indicates that position can be anything (don't care). Here are some examples:

J 0x00J 0x0004

J 0x4000501

Related Documentation

Information Technology Local and Metropolitan Area Networks±Part 12: Demand-PriorityAccess Method, Physical Layer and Repeater Specifications for100-Mb/sOperation,Draft 8.0 of the Revision Marked for Technical changes of IEEE Standard 802.12.

MAC Parameters, Physical Layer, Medium Attachment Units and Repeater for 100-Mb/sOperation,Draft 5.0 of the Supplement to 1993 version of ANSI/IEEE Std. 802.3: Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method & Physical Layer Specifications.

PCI Local Bus Specification, Revision 2.0is the specification which ThunderLAN is designed to meet. To obtain copies, contact PCI Special Interest Group, P.O. Box 14070, Portland, OR 97214, 1±800±433±5177.

ThunderLAN Adaptive Performance Optimization Technical Brief (Texas Instruments literature number SPWT089) discusses specific buffering and pacing techniques for improving adapter performance by adjusting the resources and transmit procedures to achieve optimal transmission rate and minimal CPU use.

XL24C02 Data Sheet, EXEL Microelectronics, 1993, which contains the device specifications for the XL24C022M-bitelectrically erasable EPROM.

iv

 

 

 

 

 

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Networking Home Page

 

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Mail: Texas Instruments Incorporated Email: comments@books.sc.ti.com Technical Documentation Services, MS 702

P.O. Box 1443

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Note: When ordering documentation from a Literature Response Center, please specify the literature number of the book.

Read This First

v

Trademarks

Trademarks

Ethernet is a trademark of Xerox Corporation.

ThunderLAN and Adaptive Performance Optimization are trademarks of Texas Instruments Incorporated.

vi

Contents

Contents

1 ThunderLAN Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

1.1 ThunderLAN Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

1.2 Networking Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

1.3 PCI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4

1.3.1 PCI Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4

1.3.2 Byte Ordering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5

2 ThunderLAN Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

2.1 Register Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

2.2 PCI Configuration Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

2.3 Host Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9

2.4 Internal Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11

2.5 MII PHY Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15

2.6 External Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25

2.6.1 BIOS ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25

2.6.2 LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25

2.6.3 EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-26

2.6.4 ThunderLAN EEPROM Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-30

3 Initializing and Resetting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

3.1

Initializing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-2

 

3.1.1 Finding the Network Interface Card (NIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-2

 

3.1.2 Finding the Controller in Memory and I/O Space . . . . . . . . . . . . . . . . . . . . . . . . .

3-4

 

3.1.3 Finding Which Interrupt was Assigned . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-5

 

3.1.4 Turning on the I/O Port and Memory Address Decode . . . . . . . . . . . . . . . . . . . .

3-6

 

3.1.5 Recovering the Silicon Revision Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-7

 

3.1.6 Setting the PCI Bus Latency Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-7

3.2

Resetting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-8

 

3.2.1

Hardware Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-8

 

3.2.2

Software Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-9

4 Interrupt Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4-1

4.1

Loading and Unloading an Interrupt Service Routine (ISR) . . . . . . . . . . . . . . . . . . . . . . .

4-2

4.2

Prioritizing Adapter Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4-5

4.3

Acknowledging Interrupts (Acking) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4-6

4.4

Interrupt Type Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4-7

vii