Texas Instruments SN65HVS880 User Manual

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User's Guide

SLAU245–March2008

SN65HVS880 EVM User's Guide

1 Introduction

The SN65HVS880 evaluation module (EVM) supports the parametric evaluation of the SN65HVS880 digital input serializer. It is intended to be used in conjunction with the SN65HVS880 data sheet, (SLAS252).

Note: this EVM is not intended for electromagnetic compatibility (EMC) tests.

2EVM Schematic and Layout

Figure 1 shows the board circuit schematic, andFigure 2 shows the board layout top view. The board includes a terminal block, TB1, and four connectors, JMP1 to 4.

TB1 receives the board supply of 24V nominal. V24 supplies the SN65HVS880 device, and VFIELD provides the supply for sensor switches.

Upon the application of V24, the blue Chip-OkayLED (CHOK) indicates proper board function. At the same time, the red LED indicates 5V availability at the regulator output 5VOP.

JMP1 provides the field inputs IN0:IN7 for field voltages of 24V nominal. They can be applied via:

a.an external supply in series to a sensor switch connected to a field input,

b.or a sensor switch connected between and input and VFIELD,

c.or a direct connection between an input and VFIELD.

In all three cases, a 24V level represents the ON-statusof a sensor switch, which is indicated by the corresponding LEDs D0:D7.

JMP2 provides access to the control and data lines of the internal serializer. To operate the serializer, CE must be connected either to ground or to CLK.

Upon an active-lowload pulse, (ahigh-to-low-to-hightransition) at LD, the status information of the field inputs is latched into the serializer. Applying eight consecutive clock cycles at CLK, shifts out the serializer data at SOP with each rising edge of the clock.

Cascading of multiple boards is also possible by connecting the SOP output of a leading device with the SIP input of a following device.

JMP3 allows the selection of three different debounce times and 3 different current limits.

Debounce default is 3ms, and does not require any connection between the DB inputs to ground. Otherwise, for zero debounce time connect DB1 to ground, and for 1ms debounce time connect DB0 to ground.

Note: the open DB inputs are internally pulled high and will not float.

Setting a specific current limit requires a connection between the RLIM output and one of the resistors, RLIM 1:3. For a current limit of 3.6mA connect RLIM to 24.9kΩ, for 3mA to 30.1kΩ, and for 2.5mA to 36.1kΩ.

JMP4 allows to connect VFIELD to V24, thus driving the board with only one supply.

For detailed information on device functionality and system design recommendations, see the SN65HVS880 data sheet.

SLAU245–March2008

SN65HVS880 EVM User's Guide

1

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EVM Schematic and Layout

JMP1

IN0

IN1

IN2

IN3

IN4

IN5

IN6

IN7

TB1

VFIELD

GND

V24

RLIM 1:3

R 0:7

 

 

SN65HVS880

 

D 0:7

 

1.2k

 

 

 

(3mA)

 

 

 

3

IP0

RE0

4

 

 

 

 

 

 

 

 

 

 

5

IP1

RE1

6

 

 

 

 

 

 

 

 

 

 

7

IP2

RE2

8

 

 

 

 

 

 

 

 

 

 

9

IP3

RE3

10

 

 

 

 

 

 

 

 

 

 

11

IP4

RE4

12

 

 

 

 

 

 

 

 

 

 

18

IP5

RE5

17

 

 

 

 

 

 

 

 

 

 

20

IP6

RE6

19

 

 

 

 

 

 

 

 

 

 

22

IP7

RE7

21

 

 

 

 

 

 

 

JMP2

 

 

 

 

 

 

 

 

 

 

 

SIP

27

 

 

JMP4

 

 

 

 

 

 

 

 

 

 

 

 

SIP

 

 

 

PAD

 

26

 

 

 

 

LD

 

 

 

 

 

 

 

 

2.2 F

22nF

28

FGND

 

25

 

LD

 

 

CLK

 

 

 

 

 

 

 

 

2.2 F

 

14

 

 

24

 

CLK

 

 

V24

CE

 

 

 

 

 

 

 

 

 

 

1

 

 

23

 

CE

 

 

DB0

SOP

 

 

 

 

 

 

 

 

 

 

2

 

 

16

 

SOP

 

 

DB1

CHOK

 

 

 

 

 

 

 

 

24.9k

 

13

 

 

15

 

CHOK

 

 

RLIM

5VOP

 

 

 

 

 

 

 

 

29.1k

 

 

 

 

 

 

VOP5

34.8k

 

 

 

 

 

1.3k

1.3k

 

 

 

2.2 F

 

 

 

 

 

 

 

 

JMP3

 

 

 

 

 

5VOP

CHOK

 

 

 

 

 

 

 

Figure 1. SN65HVS880 EVM Schematic

JMP1

RIN 0:7 LED 0:7

IN0

 

IN1

 

IN2

V24SEN

IN3

IN4

 

IN5

 

IN6

 

IN7

 

CHOK

5VOP

VFIELD

GND

V24

TB1

JMP4

 

 

JMP3

 

DB0

GND

 

DB1

GND

 

1:3

24.9k

 

30.1k

 

RLIM

SN65HVS880

36.1k

 

 

SN65HVS880

EVM RLIM 1:3

6498378

GND

JMP2

5VOP

CHOK

SOP

CE

CLK

LD

SIP

 

 

Figure 2. SN65HVS880 EVM layout

2

SN65HVS880 EVM User's Guide

SLAU245–March2008

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EVALUATION BOARD/KIT IMPORTANT NOTICE

Texas Instruments (TI) provides the enclosed product(s) under the following conditions:

This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLYand is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives.

Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge.

EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.

TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein.

Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For additional information on TI’s environmental and/or safety programs, please contact the TI application engineer or visit www.ti.com/esh.

No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used.

FCC Warning

This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLYand is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference.

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EVM WARNINGS AND RESTRICTIONS

It is important to operate this EVM within the input voltage range of 0 V to 30 V and the output voltage range of 0 V to 5 V.

Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.

Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.

Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.

During normal operation, some circuit components may have case temperatures greater than 85°C. The EVM is designed to operate properly with certain components above 85°C as long as the input and output ranges are maintained. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

Copyright © 2008, Texas Instruments Incorporated

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