Texas Instruments PCI445X User Manual

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Implementation

Guide

August 2000

PCI Bus Solutions

SCPU007

IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.

Customers are responsible for their applications using TI components.

In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.

Copyright 2000, Texas Instruments Incorporated

Notational Conventions

Preface

Read This First

About This Manual

This manual is intended to assist the designer who is attempting to implement a solution using the PCI4450 or PCI4451. Much, but not all, of the information contained herein can also be found elsewhere. However, the smaller size of this manual, as well as its organization by topics of primary interest to the hardware designer, make it a much more usable source regarding those problems most likely to be encountered in the design process.

How to Use This Manual

This document contains the following chapters:

Chapter 1, PCI445X Device, provides the designer with information and examples beyond that contained in the data manuals, which will be useful for implementing solutions using the PCI4450 or PCI4451.

Appendix A, Global Reset Only Bits, PME Context Bitscontains tabular listings of those register bits that can only be cleared by a global reset, and of those register bits used in conjunction with power management events.

Appendix B, PME and RI Behavior, provides truth tables that explain events and conditions which can wake up a device that has been placed in partially functional state for power conservation.

Appendix C, PCI445X Buffer Types, lists the type of signal buffering used for input and/or output on each terminal of the device.

Notational Conventions

This document uses the following conventions.

Program listings, program examples, and interactive displays are shown in a special typeface similar to a typewriter's. Examples use abold version of the special typeface for emphasis; interactive displays use abold version of the special typeface to distinguish commands that you

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enter from items that the system displays (such as prompts, command output, error messages, etc.).

Here is a sample program listing:

0011

0005

0001

.field

1, 2

0012

0005

0003

.field

3,

4

0013

0005

0006

.field

6,

3

0014

0006

 

.even

 

 

Here is an example of a system prompt and a command that you might enter:

C:csr ±a /user/ti/simuboard/utilities

In syntax descriptions, the instruction, command, or directive is in a bold typeface font and parameters are in anitalic typeface. Portions of a syntax that are inbold should be entered as shown; portions of a syntax that are initalics describe the type of information that should be entered. Here is an example of a directive syntax:

.asect ªsection nameº, address

.asect is the directive. This directive has two parameters, indicated by section name andaddress. When you use .asect, the first parameter must be an actual section name, enclosed in double quotes; the second parameter must be an address.

Square brackets ( [ and] ) identify an optional parameter. If you use an optional parameter, you specify the information within the brackets; you don't enter the brackets themselves. Here's an example of an instruction that has an optional parameter:

LALK 16±bit constant [, shift]

The LALK instruction has two parameters. The first parameter, 16-bit constant, is required. The second parameter,shift, is optional. As this syntax shows, if you use the optional second parameter, you must precede it with a comma.

Square brackets are also used as part of the pathname specification for VMS pathnames; in this case, the brackets are actually part of the pathname (they are not optional).

Braces ( { and } ) indicate a list. The symbol | (read asor) separates items within the list. Here's an example of a list:

{ * | *+ | *± }

This provides three choices: *,*+, or.

Unless the list is enclosed in square brackets, you must choose one item from the list.

Some directives can have a varying number of parameters. For example, the .byte directive can have up to 100 parameters. The syntax for this directive is:

.byte value1 [, ... , valuen ]

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Trademarks

This syntax shows that .byte must have at least one value parameter, but you have the option of supplying additional value parameters, separated by commas.

Related Documentation From Texas Instruments

PCI4450 GFN/GJG PC Card and OHCI Controller Data Sheet, SCPS046

PCI4451 GFN/GJG PC Card and OHCI Controller Data Manual, SCPS054

OHCI.Lynx Configuration Information Application Report, SLLA077

PHY Layout Recommendations Application Report, SLLA020A

TSB41LV03A Data Sheet, SLLS364

http://www.ti.com/sc/1394

http://www.ti.com/sc/docs/apps/analog/1394_physical_layer_controllers.html

FCC Warning

This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference.

Trademarks

MicroStar BGA is a trademark of Texas Instruments.

TI is a trademark of Texas Instruments.

Windows is a registered trademark of Microsoft Corporation. (Windows 95, Windows )

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Contents

Contents

1 PCI445X Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1±1

1.1 System Features Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-31.1.1 Package Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-31.1.2 G_RST and PRST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-31.1.3 PME and RI Signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-31.1.4 ZV Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-31.1.5 EEPROM for Subsystem Vendor and Subsystem ID Registers . . . . . . . . . . . .1-31.1.6 PCI and ISA Style Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-41.1.7 Socket Power Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-41.1.8 Distributed DMA (DDMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-41.1.9 Optional PCI Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-41.1.10 Socket Activity LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-51.1.11 MFUNC7±MFUNC0 Terminal Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-51.1.12 Miscellaneous Functions Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-5

1.2 System Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-81.2.1 Clamping Rails . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-81.2.2 PCI Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-81.2.3 PC Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-101.2.42-Wire(I2C) Interface for EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-10

1.3 Sample PCI445X EEPROM Data File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-121.3.1 P2C Interface for TPS22x6 Power Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-141.3.2 Zoomed Video (ZV) Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-141.3.3 Interrupt Signaling Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-151.3.4 Miscellaneous Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-151.3.5 Requirement of Pullup/Pulldown Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-16

1.4 BIOS Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-191.4.1 Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-191.4.2 System Sleeping State Consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-201.4.3 Docking System Consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-21

1.5 Important Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-221.5.1 G_RST Clamping Rail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-221.5.2 PME/RI_OUT Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-221.5.3 Serialized IRQ Data Stream . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-221.5.4 Socket Power Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-221.5.5 External CLOCK Frequency for P2C Interface . . . . . . . . . . . . . . . . . . . . . . . . . .1-22

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A

Global Reset Only Bits, PME Context Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A-1

 

A.1

Global Reset Only Bits/PME Context Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A-2

B

PME and RI Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

B-1

 

B.1

PME and RI Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

B-2

C PCI445X Buffer Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-1

C.1 PCI445X Buffer Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2

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Figures

1±1 Typical System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-21±2 Serialized Interrupt Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-51±3 EEPROM2-WireInterface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-101±4 TPS22X6 Power Switch Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-141±5 Example of a ZV Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-141±6 Distributed DMA Signal Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-161±7 G_RST and VCCP Relationship . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-22

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Tables

1±1

Registers and Bits Loadable Through Serial EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-11

1±2

PC Card Interface Pullup Register List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-16

1±3

PCI Bus Interface Pullup Register List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-17

1±4

Miscellaneous Terminals Pullup Register List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-17

1±5

Required Pullup/Pulldown Resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-18

A±1

Global Reset Only Cleared Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A-2

A±2

PME Context Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

A-3

B±1

CardBus CTSCHG and Wake-UpSignals Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

B-2

B±2

16-BitCard RI/STSCHG andWake-UpSignals Truth Table . . . . . . . . . . . . . . . . . . . . . . . . .

B-2

C±1

PCI445X Terminal Function Assignment and Buffer Types . . . . . . . . . . . . . . . . . . . . . . . . . .

C-2

C±2

Buffer Type Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

C-7

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