Texas Instruments CDCM7005 User Manual

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CDCM7005 (QFN Package)

Evaluation Module Manual

HPA/High Speed Communications

User’s Guide

2005

Clock Drivers

SCAU015

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards.

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Mailing Address:

Texas Instruments

 

 

 

Post Office Box 655303 Dallas, Texas 75265

 

Copyright 2005, Texas Instruments Incorporated

EVM IMPORTANT NOTICE

Texas Instruments (TI) provides the enclosed product(s) under the following conditions:

This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of requireddesign-,marketing-,and/ormanufacturing-relatedprotective considerations, including product safety measures typically found in the end product incorporating the goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may not meet the technical requirements of the directive.

Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge.

EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.

TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein.

Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM User’s Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact the TI application engineer.

Persons handling the product must have electronics training and observe good laboratory practice standards.

No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used.

Mailing Address:

Texas Instruments

Post Office Box 655303

Dallas, Texas 75265

Copyright 2004, Texas Instruments Incorporated

EVM WARNINGS AND RESTRICTIONS

It is important to operate this EVM within the supply voltage range of 3 V and 3.6 V.

Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.

Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.

During normal operation, some circuit components may have case temperatures greater than 45°C. The EVM is designed to operate properly with certain components above 60°C as long as the input and output ranges are maintained. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified using the EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch.

Mailing Address:

Texas Instruments

Post Office Box 655303

Dallas, Texas 75265

Copyright 2004, Texas Instruments Incorporated

Related Documentation From Texas Instruments

Preface

Read This First

About This Manual

This manual explains how to use the CDCM7005 evaluation module (EVM) and provides guidelines to build the customer’s own systems. The manual includes schematics, layout, bill of materials, and a software description.

How to Use This Manual

This document contains the following chapters:

-Chapter 1—Introduction

-Chapter 2—QuickStart

-Chapter 3—EVMHardware

-Chapter 4—SerialPeripheral Interface (SPI) Software

-Chapter 5—Schematics,Board Layout, and Parts List

Related Documentation From Texas Instruments

- CDCM7005 Data Sheet, SCAS793, Texas Instruments

FCC Warning

This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference.

If You Need Assistance. . .

If you need assitance with this device, please email clocks_apps@list.ti.com

iii

Contents

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

1.1 CDCM7005 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

2 Quick Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

3 EVM Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

3.1 Board View and Connector Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-23.2 Hardware Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-23.2.1 Power Supply (P1, P2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-23.2.2 Onboard Switches and Indicators (SW1−SW2, D1−D4) . . . . . . . . . . . . . . . . . . .3-23.2.3 Programming Interfaces (J30, J31) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-33.2.4 Loop Filter (J32−J34) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3

3.2.5High-SpeedOutputs and Inputs (J1−J4, J6−J11, J13, J14, J22, and J23) . . .3-3

3.2.6 VCXO Inputs and Outputs (J16−J18) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4

3.2.7AC-Couplingat PRI_REF (C1, R4, R6) and SEC_REF (C5, R13, R15) . . . . .3-4

4 Serial Peripheral Interface (SPI) Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

4.1 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24.2 Software Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-2

5 Application Level Circuit Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

5.1 Application Circuit Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25.1.1 Passive Loop Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-25.1.2External Active Loop Filter Using OPA341 . . . . . . . . . . . . . . . . . . . . . . . . . .5-3

6 Parts List, Board Layouts, and Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1

6.1 Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2

6.2 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4

6.3 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9

v

Contents

Figures

3−1 Board View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-24−1 Screen View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-25−1CDCM7005 With a Passive Loop Filter Configuration . . . . . . . . . . . . . . . . . . . . . . . . .5-25−2 CDCM7005 With an External Active Loop Filter Using OPA341 . . . . . . . . . . . . . . . . . . . . .5-36−1 Component View and Silkscreen (Top Side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-56−2 Component View and Silkscreen (Bottom Side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-66−3 Top Layer View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-76−4 Bottom Layer View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-86−5 Ground Plane View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-96−6 Power Layer View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-10

Tables

3−1

Filter Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-3

vi

Chapter 1

Introduction

The CDCM7005 is a high-performance,low phase noise and low skew clock synchronizer that synchronizes anon-boardvoltage controlled crystal oscillator (VC(X)O) frequency to an external reference clock. The device operates up to 2.2 GHz. The PLL loop bandwidth and damping factor can be adjusted to meet different system requirements by selecting the external VC(X)O, loop filter components, frequency for PFD, and charge pump current. Each of the five differential LVPECL and five LVCMOS pair outputs can be programmed by a serial peripheral interface (SPI). The SPI allows individual control of the frequency and enable/disable state of each output. As the system requires external components like a loop filter and VC(X)O, this EVM provides an easy method to evaluate and modify the performance and parameters of the clock system in conjunction with the specific customer application. Loop bandwidth can be selected as low as 10 Hz or less, allowing the device to clean the system’s clock jitter.

In non PLL mode, the CDCM7005 can be used as a simple LVPECL or LVCMOS buffer with divider options.

Topic

Page

1.1CDCM7005 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

Introduction 1-1

CDCM7005 Functional Block Diagram

1.1 CDCM7005 Functional Block Diagram

VCC

AVCC

VCC_CP

 

 

Selected REF Signal

 

REF_SEL

Manual &

 

 

Automatic

freq. detect

 

 

CLK Select

> 2 MHz

 

 

 

freq. detect

 

 

> 2 MHz

PRI_REF

 

MUXREF

 

 

LVCMOS

Progr. Delay

 

Reference

M

 

 

 

 

 

SEC_REF

 

Clock

 

 

 

 

 

 

Feedback

Progr. Delay

 

 

Clock

N

CTRL_LE

 

SPI LOGIC

 

CTRL_DATA

 

 

 

CTRL_CLK

 

 

PECL

 

 

 

 

 

 

to

 

 

 

LVCMOS

PD

 

 

 

RESET or

 

 

FB_MUX

 

 

 

HOLD

 

 

 

VCXO_IN PECL VCXO_ININPUT

1

2

3

4

6

/8

16

4o90

8

90o

 

P16−Div

P Divider

VBB

Bias Generator

VCC − 1.3 V

 

 

 

 

 

STATUS_REF /

 

 

 

 

PRI_SEC_CLK

 

 

 

 

STATUS_VCXO

 

 

 

 

/ I_REF_CP

 

 

 

 

PLL_LOCK

 

 

LOCK

HOLD

 

Progr. Divider

 

 

 

M

210

 

 

 

 

 

PFD

Charge

CP_OUT

Progr. Divider

Pump

 

 

N

212

 

 

 

 

 

 

 

Current

 

 

 

 

Reference

 

 

 

 

LV

 

 

 

 

CMOS

 

 

MUXY0

 

Y0A

 

 

 

LV

 

 

 

 

PECL

 

 

 

 

Y0B

 

 

 

 

LV

 

 

 

 

CMOS

 

 

 

 

LV

 

 

 

 

CMOS

 

 

MUXY1

 

Y1A

 

 

 

LV

 

 

 

 

PECL

 

 

 

 

Y1B

 

 

 

 

LV

 

 

 

 

CMOS

 

 

 

 

LV

 

 

 

 

CMOS

 

 

MUXY2

 

Y2A

 

 

 

LV

 

 

 

 

PECL

 

 

 

 

Y2B

 

 

 

 

LV

 

 

 

 

CMOS

 

 

 

 

LV

 

 

 

 

CMOS

 

 

MUXY3

 

Y3A

 

 

 

LV

 

 

 

 

PECL

 

 

 

 

Y3B

 

 

 

 

LV

 

 

 

 

CMOS

 

 

 

 

LV

 

 

 

 

CMOS

 

 

MUXY4

 

Y4A

 

 

 

LV

 

 

 

 

PECL

 

 

 

 

Y4B

 

 

 

 

LV

 

 

 

 

CMOS

GND

1-2

Chapter 2

Quick Start

In order to setup the EVM quickly and to take some measurements at default settings, the following actions are required:

-Supply 3.3 V to P1, LED D4 will be on.

-Apply a single-endedreference clock to the reference clock input PRI_REF (pin A1) or SEC_REF (pin B1). For default setting, the reference clock must be 1/8th of the VC(X)O frequency. If REF_SEL is set to 1, then PRI_REF is selected. If REF_SEL is set to 0, then SEC_REF is selected. This selection can be realized via J26 (header 1 and 2 is high; header 2 and 3 is low).

-Connect Y0/Y0B (or Y1/Y1B) to oscilloscope in order to check an output signal. Ensure the oscilloscope has 50 Ω to ground termination.

After power up, D1 is on if there is a valid reference clock and D2 is on if there is a valid VC(X)O clock for the CDCM7005. If D3 turns on, then the reference clock and the VC(X)O clocks are phase locked.

Quick Start

2-1