Texas Instruments BQ24351EVM User Manual
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User's Guide

SLUU455 – October 2010

bq24351EVM for Li-IonChargerFront-EndProtection IC

This user'sguide describes the features, setup, and operation of the bq24351EVM evaluation module. Included are the bill of materials, board layout, and schematic.

 

 

 

Contents

1

Introduction ..................................................................................................................

2

 

1.1

General Description ................................................................................................

2

 

1.2

EVM Features ......................................................................................................

2

 

1.3

I/O Description ......................................................................................................

2

 

1.4

Controls and Key Parameters Setting ...........................................................................

3

 

1.5

Recommended Operating Conditions ...........................................................................

3

2

Test Summary ...............................................................................................................

3

 

2.1

Definitions ...........................................................................................................

3

 

2.2

Equipment ...........................................................................................................

3

 

2.3

Equipment Setup ...................................................................................................

4

 

2.4

Procedure ...........................................................................................................

5

3

PCB Layout Guideline ......................................................................................................

5

4

Bill of Materials, Board Layout, and Schematic

......................................................................... 6

 

4.1

Bill of Materials .....................................................................................................

6

 

4.2

Board Layout .......................................................................................................

7

 

4.3

Schematic .........................................................................................................

11

 

List of Figures

 

1

Original Test Setup for HPA666 (bq24351 DSG EVM) ................................................................

4

2

Top Layer ....................................................................................................................

7

3

Bottom Layer ................................................................................................................

8

4

Top Silk Screen .............................................................................................................

9

5

Top Assembly ..............................................................................................................

10

6

bq24351 Schematic .......................................................................................................

11

 

 

List of Tables

1

Bill of Materials

.............................................................................................................. 6

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Introduction

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1 Introduction

1.1General Description

The bq24351 evaluation module (EVM) is a complete charger module for evaluating a charger front-endprotection and charger solution using the bq24351 and bq2057C devices. It is designed to deliver up to 560 mA of charge current toLi-ionorLi-polymerapplications. The chargerfront-endprotection current is designed to 1.2 A.

The bq24351 protects the charging system against three types of failures: input overvoltage when the ac adapter fails to regulate its voltage, load overcurrent when failures such as a short circuit occur in the charging system, and battery overcharge.

For details, see the bq24351 data sheet (SLUSA62).

1.2EVM Features

Evaluation module for bq24351 DSG

Evaluation module for bq2057C charger integrated circuit (IC)

Input operating range for bq24351 4.5 V–26V

Input overvoltage protection.

Input overcurrent protection.

Battery overvoltage protection.

LED indication for status signals.

Test points for key signals available for testing purposes. Easy probe hook-up

Jumpers available. Easy to change connections

1.3I/O Description

Jack

Description

 

 

J1–DC+

AC adapter, positive output

 

 

J1–DC–

AC adapter, negative output, ground

 

 

J2–FAULT

Reserved for other ICs

 

 

J2–VBAT

bq24351 VBAT pin

 

 

J2–GATDRV

bq24351 GATDRV pin

 

 

J2–CHGIN

bq24351 CHGIN pin

 

 

J3–BATEN

Reserved for ohter ICs

 

 

J3–OUT

bq24351 OUT pin

 

 

J3–BAT+

Battery positive output

 

 

J3–GND

Ground

 

 

J4–BAT+

Connect to battery positive output

 

 

J4–BAT–

Connect to battery negative output, ground

 

 

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Test Summary

1.4Controls and Key Parameters Setting

Jack (1)

Description

Factory Setting

JP1

If on, high-sidesensing resistor is disabled

Jumper on

 

 

 

JP2

Reserved for other ICs

Jumper (BATEN, GND) on

 

 

 

JP3

bq24351 GATDRV pin

Jumper off

 

 

 

JP4

bq2057C BAT pin connection to bq24351

Jumper on

 

 

 

JP5

bq2057C VCC pin connection to bq24351

Jumper on

 

 

 

JP6

bq2057C CC pin connection to bq24351

Jumper on

 

 

 

JP7

If on, low-sidecurrent-sensingresistor is disabled

Jumper off

 

 

 

(1)Short JP1, JP4, JP5, and JP6, and disconnect JP7 to use onboard bq2057C as charger; to use external charger to control bq24351, disconnect JP1, JP4, JP5, and JP6 and short JP7.

1.5Recommended Operating Conditions

Symbol

Description

MIN

TYP

MAX

Unit

 

 

 

 

 

 

Supply voltage, VIN

Input voltage from ac adapter input

4.5

5

26

V

 

 

 

 

 

 

Battery voltage, VBAT

Voltage applied at VBAT terminal of J4

0

3–4.2

5

V

 

 

 

 

 

 

Supply current, IAC

Maximum input current from ac adapter input

0

 

1.5

A

 

 

 

 

 

 

Charge current, Ichrg

Battery charge current

0.05

0.56

1

A

 

 

 

 

 

 

Operating junction temperature range, TJ

 

0

 

125

°C

 

 

 

 

 

 

2 Test Summary

2.1Definitions

This procedure details how to configure the evaluation board. On the test procedure, the following naming conventions are followed. See the schematic for details.

VXXX

External voltage supply name (VIN, VBAT, VOUT)

LOADW

External load name (LOADR, LOADI)

V(TPyyy)

Voltage at internal test point TPyyy. For example, V(TP1) means the voltage at

 

TP1.

V(Jxx):

Voltage at jack terminal Jxx.

V(TP(XXXXX))

Voltage at test point XXXXX. For example, V(ACDET) means the voltage at the

 

test point which is marked as ACDET.

V(XXX, YYY)

Voltage across points XXX and YYY.

I(JXX(YYY))

Current going out from the YYY terminal of jack XX.

Jxx(BBB)

Terminal or pin BBB of jack xx

Jxx ON

Internal jumper Jxx terminals are shorted

Jxx OFF

Internal jumper Jxx terminals are open

Jxx (-YY-)ON

Internal jumper Jxx adjacent terminals marked as YY are shorted

Measure → A,B

Check specified parameters A, B. If measured values are not within specified

 

limits, the unit under test has failed.

Observe → A,B

Observe if A, B occur. If they do not occur, the unit under test has failed.

Assembly drawings show locations for jumpers, test points, and individual components.

2.2Equipment

2.2.1Power Supplies

Power supply 1 (PS 1): a power supply capable of supplying 15 V at 2 A is required.

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Test Summary

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2.2.2Load 1

A 10-V(or above),2-A(or above) electronic load that can operate inconstant-currentmode.

2.2.3Load 2

A 10-V(or above),2-A(or above) electronic load that can operate inconstant-voltagemode.

2.2.4Meters

Four Fluke 75 multimeters (equivalent or better)

Or:

Three equivalent voltage meters and one equivalent current meter

The current meter must be capable of measuring 2-A+current.

2.2.5Wire Gauge

All wires connected to the EVM input power supply and output load must be at least AWG 22. The maximum current is up to 1 A.

2.3Equipment Setup

1.Set PS 1 for 0 V ±100 mVdc, 2 ± 0.1 A current limit, and then disable the output.

2.Connect the output of PS 1 to J1 (DC+, DC–).

3.Connect a voltage meter across J1 (DC+, DC–).

4.Connect the output of load 1 in series with a current meter (multimeter) to J2 (CHGIN) and J3 (GND). Turn on the power of load 1. Set the load current to 1.5 A ±50 mA, but disable the output.

5.Connect the output of load 2 in series with a current meter (multimeter) to J4 (BAT+, BAT–).

6.Connect a voltage meter across J4 (BAT+, BAT–).

7.Set the voltage of load 2 to 3.6 V ±0.1 V, and disable output of load 2.

8.JP1: ON, JP2 (BATEN, GND): ON, JP3: OFF, JP4: ON, JP5: ON, JP6: ON, JP7: OFF.

After the preceding steps have been taken, the test setup for HPA666 (bq24351 DSG EVM) appears as is shown in Figure 1.

Supply 1

HPA666 bq24351EVM

 

 

 

 

 

JP7

 

 

 

 

 

 

J1

 

JP1

 

 

J4

 

V

 

 

 

 

 

V

2

DC+

 

U1

 

 

BAT+

 

 

 

 

 

I

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ibat

CFET APPLICATION

 

 

 

 

 

CIRCUIT

 

 

JP6

JP5

JP4

 

 

 

JP3

JP2

 

 

 

 

 

 

 

 

 

 

U2

 

 

FAULT VBAT

GATDRV CHGIN

BATEN OUT

BAT+ GND

 

 

 

 

J2

 

 

J3

 

 

 

 

 

 

 

 

 

 

Load

 

 

 

 

I

 

I

1

 

 

 

 

 

 

 

 

Figure 1. Original Test Setup for HPA666 (bq24351 DSG EVM)

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PCB Layout Guideline

2.4Procedure

2.4.1Charger Current and Voltage Regulation

1.Ensure that steps in Section 2.3 are followed.

2.Enable output of PS 1.

3.Increase the output voltage of PS 1 to 5 V ±0.1 V.

4.Enable the output of load 2.

Measure → V(J2(OUT)) = 3.6 V ±200 mVMeasure → Ibat = 560 mA ±70 mAObserve → D2 on, D3 on, D6 off, D7 on.

2.4.2CFET Input Overvoltage Protection

1.Increase the voltage of PS 1 to 11 V ±0.1 V. Observe → D2 on, D3 off, D6 off, D7 off.

2.Decrease the voltage of PS 1 to 5 V ±0.1 V. Observe → D2 on, D3 on, D6 off, D7 on.

2.4.3CFET Load Overcurrent Protection

1.Enable the output of load 1.

Observe → D2 on, D3 off, D6 off, D7 off.

2.Disable the output of load 1.

Observe → D2 on, D3 on, D6 off, D7 on.

3.Decrease the voltage of PS 1 to 0 V ±0.1 V.

3PCB Layout Guideline

1.It is critical that the exposed thermal pad on the back side of the bq24351 package be soldered to the printed-circuitboard (PCB) ground. Ensure that sufficient thermal vias are located underneath the IC, connecting to the ground plane on the other layers.

2.The high-currentcharge paths into ACIN and from the CHGIN and OUT pins must be sized appropriately for the maximum charge current in order to avoid excessive voltage drops in these traces.

3.Decoupling capacitors for ACIN and CHGIN must be placed to make the interconnections to the IC as short as possible.

4.Resistors for VBAT pin must be placed close to the corresponding IC pins and make the interconnections to the IC as short as possible.

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Bill of Materials, Board Layout, and Schematic

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4 Bill of Materials, Board Layout, and Schematic

4.1Bill of Materials

Table 1. Bill of Materials

bq24351

RefDes

Value

Description

Size

Part Number

MFR

 

 

 

 

 

 

 

1

C1

1 µF

Capacitor, ceramic, 35-V,X5R, 10%

603

Std

Std

 

 

 

 

 

 

 

3

C2, C3, C5

1 µF

Capacitor, ceramic, 10-V,X7R, 10%

603

Std

Std

 

 

 

 

 

 

 

1

C4

0.1 µF

Capacitor, ceramic, 16-V,X7R, 10%

805

Std

Std

 

 

 

 

 

 

 

1

C6

0.1 µF

Capacitor, ceramic, 10-V,X7R, 10%

603

Std

Std

 

 

 

 

 

 

 

1

C7

220 µF

Capacitor, electrolytic, 25-V,20%

0.327 inch × 0.327

UUD1E221MNL1GS

Nichicon

 

 

 

 

inch (8.3 mm × 8.3

 

 

 

 

 

 

mm)

 

 

 

 

 

 

 

 

 

1

D1

BZT52C6V8S

Diode, zener, 200-mW,6.8-V

SOD-323

BZT52C6V8S

General

 

 

 

 

 

 

 

3

D2, D3, D6

Green

Diode, LED, green, 2.1-V,20-mA,6-mcd

603

LTST-C190GKT

LITE-ON

 

 

 

 

 

 

 

2

D4, D7

Red

Diode, LED, red, 2.1-V,20-mA,6-mcd

603

LTST-C190CKT

Lite-On

 

 

 

 

 

 

 

1

D5

BAT54C

Diode, dual Schottky, 200-mA,30-V

SOT23

BAT54C

Vishay/LITE-

 

 

 

 

 

 

ON

 

 

 

 

 

 

 

2

J1, J4

ED1514/2DS

Terminal block, 2-pin,6-A,3.5-mm

0.27 inch × 0.25

ED1514/2DS

OST

 

 

 

 

inch (6.86 mm ×

 

 

 

 

 

 

6.35 mm)

 

 

 

 

 

 

 

 

 

2

J2, J3

ED1516/4DS

Terminal block, 4-pin,6-A,3.5-mm

0.55 inch × 0.25

ED1516/4DS

OST

 

 

 

 

inch (14 mm × 6.35

 

 

 

 

 

 

mm)

 

 

 

 

 

 

 

 

 

5

JP1, JP4, JP5,

PEC02SAAN

Header, 2-pin,100-mil(2.54-mm)spacing

0.100 inch (2.54

PEC02SAAN

Sullins

 

JP6, JP7

 

 

mm) × 2

 

 

 

 

 

 

 

 

 

2

JP2, JP3

PTC03SAAN

Header, male 3-pin,100-mil(2.54-mm)spacing,

0.100 inch (2.54

PTC03SAAN

Sullins

 

 

 

(36-pinstrip)

mm) × 3

 

 

 

 

 

 

 

 

 

5

 

929950-00

Shorting jumpers, 2-pin,100-mil(2.54-mm)

 

929950-00

3M/ESD

 

 

 

spacing

 

 

 

 

 

 

 

 

 

 

2

R1, R2

0

Resistor, chip, 1/16-W,1%

402

Std

Std

 

 

 

 

 

 

 

0

R3, R4

0

Resistor, chip, 1/16-W,1%

402

Std

Std

 

 

 

 

 

 

 

2

R5, R6

200 kΩ

Resistor, chip, 1/16-W,5%

402

Std

Std

 

 

 

 

 

 

 

2

R7, R8

200 kΩ

Resistor, chip, 1/16-W,5%

603

Std

Std

 

 

 

 

 

 

 

2

R9, R10

0.2 Ω

Resistor, metal film, 1/4-W,1%

1206

Std

Std

 

 

 

 

 

 

 

1

R11

20 kΩ

Resistor, chip, 1/16-W,5%

603

Std

Std

 

 

 

 

 

 

 

1

R12

100 kΩ

Resistor, chip, 1/16-W,5%

603

Std

Std

 

 

 

 

 

 

 

1

R13

100 Ω

Resistor, chip, 1/16-W,5%

603

Std

Std

 

 

 

 

 

 

 

1

R14

6.2 kΩ

Resistor, chip, 1/16-W,5%

603

Std

Std

 

 

 

 

 

 

 

4

R15, R16, R17,

1.5 kΩ

Resistor, chip, 1/16-W,5%

603

Std

Std

 

R18

 

 

 

 

 

 

 

 

 

 

 

 

1

R19

51 Ω

Resistor, chip, 1/16-W,5%

603

Std

Std

 

 

 

 

 

 

 

4

 

 

6-32NYL nuts

NY HN 632

H620-ND

Building

 

 

 

 

 

 

Fasteners

 

 

 

 

 

 

 

4

ST1, ST2, ST3,

4816

Standoff, M/F, hex 6-32NYL, 0.500 inch (12.7

sf_thvt_325_rnd

4816

Keystone

 

ST4

 

mm)

 

 

 

 

 

 

 

 

 

 

8

TP1, TP2, TP3,

White

Test point, white, thru hole, color-keyed

0.100 × 0.100 inch

5002

Keystone

 

TP4, TP5, TP6,

 

 

(2.54 mm × 2.54

 

 

 

TP7, TP8

 

 

mm)

 

 

 

 

 

 

 

 

 

1

TP9

White

Test point, white, thru hole, color-keyed

0.100 × 0.100 inch

5001

Keystone

 

 

 

 

(2.54 mm × 2.54

 

 

 

 

 

 

mm)

 

 

 

 

 

 

 

 

 

1

U1

bq24351DSG

IC, overvoltage and overcurrent charger front-end

SON-8

bq24351DSG

TI

 

 

 

 

 

 

 

1

U2

bq2057CSN

IC, charge management, oneor two-cellLi-Ion

SOIC(SN)

bq2057CSN

TI

 

 

 

or Li-Polcharger

 

 

 

 

 

 

 

 

 

 

1

HPA666

PCB, 2.8-inch×2.8-inch×0.062-inch(7.11-cm×

 

PCB

Any

 

 

 

7.11-cm×1.58-mm)

 

 

 

 

 

 

 

 

 

 

Notes: 1.

Number 0 in left side columns means do not use this component.

 

 

 

2.

Std in part number column means standard manufacturer’s part number.

 

 

 

 

 

 

 

 

 

 

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Bill of Materials, Board Layout, and Schematic

4.2Board Layout

C001

Figure 2. Top Layer

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Bill of Materials, Board Layout, and Schematic

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C002

Figure 3. Bottom Layer

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Bill of Materials, Board Layout, and Schematic

C003

Figure 4. Top Silk Screen

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C004

Figure 5. Top Assembly

10

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