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TMS320x28xx, 28xxx Enhanced Pulse Width

Modulator (ePWM) Module

Reference Guide

Literature Number: SPRU791D

November 2004–RevisedOctober 2007

2

SPRU791D–November2004–RevisedOctober 2007

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Contents

Preface ...............................................................................................................................

 

 

 

9

1

Introduction

.............................................................................................................

 

13

 

1.1

Introduction.........................................................................................................

 

14

 

1.2

Submodule Overview .............................................................................................

 

14

 

1.3

Register Mapping..................................................................................................

 

17

2

ePWM Submodules ...................................................................................................

 

19

 

2.1

Overview............................................................................................................

 

20

 

2.2

Time-Base (TB) Submodule .....................................................................................

 

23

 

 

2.2.1 Purpose of the Time-Base Submodule................................................................

 

23

 

 

2.2.2 Controlling and Monitoring the Time-baseSubmodule..............................................

 

24

 

 

2.2.3 Calculating PWM Period and Frequency..............................................................

 

25

 

 

2.2.4 Phase Locking the Time-BaseClocks of Multiple ePWM Modules................................

 

30

 

 

2.2.5 Time-baseCounter Modes and Timing Waveforms.................................................

 

30

 

2.3

Counter-Compare (CC) Submodule ............................................................................

 

32

 

 

2.3.1 Purpose of the Counter-Compare Submodule .......................................................

 

33

 

 

2.3.2 Controlling and Monitoring the Counter-CompareSubmodule.....................................

 

33

 

 

2.3.3 Operational Highlights for the Counter-CompareSubmodule......................................

 

34

 

 

2.3.4 Count Mode Timing Waveforms .......................................................................

 

34

 

2.4

Action-Qualifier (AQ) Submodule ...............................................................................

 

37

 

 

2.4.1 Purpose of the Action-Qualifier Submodule ..........................................................

 

37

 

 

2.4.2 Action-QualifierSubmodule Control and Status Register Definitions.............................

 

37

 

 

2.4.3

Action-Qualifier Event Priority ..........................................................................

 

40

 

 

2.4.4 Waveforms for Common Configurations ..............................................................

 

41

 

2.5

Dead-Band Generator (DB) Submodule .......................................................................

 

50

 

 

2.5.1 Purpose of the Dead-Band Submodule ...............................................................

 

50

 

 

2.5.2 Controlling and Monitoring the Dead-BandSubmodule.............................................

 

50

 

 

2.5.3 Operational Highlights for the Dead-BandSubmodule..............................................

 

51

 

2.6

PWM-Chopper (PC) Submodule ................................................................................

 

55

 

 

2.6.1 Purpose of the PWM-Chopper Submodule ...........................................................

 

55

 

 

2.6.2 Controlling the PWM-Chopper Submodule ...........................................................

 

55

 

 

2.6.3 Operational Highlights for the PWM-ChopperSubmodule..........................................

 

55

 

 

2.6.4

Waveforms ................................................................................................

 

56

 

2.7

Trip-Zone (TZ) Submodule.......................................................................................

 

59

 

 

2.7.1 Purpose of the Trip-Zone Submodule .................................................................

 

59

 

 

2.7.2 Controlling and Monitoring the Trip-ZoneSubmodule...............................................

 

60

 

 

2.7.3 Operational Highlights for the Trip-ZoneSubmodule................................................

 

60

 

 

2.7.4 Generating Trip Event Interrupts .......................................................................

 

62

 

2.8

Event-Trigger (ET) Submodule ..................................................................................

 

63

 

 

2.8.1 Operational Overview of the Event-TriggerSubmodule.............................................

 

64

3

Applications to Power Topologies ..............................................................................

 

69

 

3.1

Overview of Multiple Modules ...................................................................................

 

70

 

3.2

Key Configuration Capabilities...................................................................................

 

70

 

3.3

Controlling Multiple Buck Converters With Independent Frequencies .....................................

 

71

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3.4

Controlling Multiple Buck Converters With Same Frequencies .............................................

75

 

3.5

Controlling Multiple Half H-Bridge (HHB) Converters ........................................................

78

 

3.6

Controlling Dual 3-PhaseInverters for Motors (ACI and PMSM)...........................................

80

 

3.7

Practical Applications Using Phase Control Between PWM Modules......................................

84

 

3.8

Controlling a 3-Phase Interleaved DC/DC Converter.........................................................

85

 

3.9

Controlling Zero Voltage Switched Full Bridge (ZVSFB) Converter ........................................

89

4

Registers .................................................................................................................

93

 

4.1

Time-Base Submodule Registers ...............................................................................

94

 

4.2

Counter-Compare Submodule Registers.......................................................................

97

 

4.3

Action-Qualifier Submodule Registers..........................................................................

99

 

4.4

Dead-Band Submodule Registers .............................................................................

103

 

4.5

PWM-Chopper Submodule Control Register.................................................................

105

 

4.6

Trip-Zone Submodule Control and Status Registers........................................................

106

 

4.7

Event-Trigger Submodule Registers ..........................................................................

110

 

4.8

Proper Interrupt Initialization Procedure ......................................................................

115

A

Revision History .....................................................................................................

117

4

Contents

SPRU791D–November2004–RevisedOctober 2007

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List of Figures

1-1

Multiple ePWM Modules...................................................................................................

 

15

1-2

Submodules and Signal Connections for an ePWM Module .........................................................

 

16

1-3

ePWM Submodules and Critical Internal Signal Interconnects ......................................................

 

17

2-1

Time-Base Submodule Block Diagram ..................................................................................

 

23

2-2

Time-Base Submodule Signals and Registers .........................................................................

 

24

2-3

Time-Base Frequency and Period .......................................................................................

 

26

2-4

Time-Base Counter Synchronization Scheme 1 .......................................................................

 

27

2-5

Time-Base Counter Synchronization Scheme 2 .......................................................................

 

28

2-6

Time-Base Counter Synchronization Scheme 3 .......................................................................

 

29

2-7

Time-Base Up-Count Mode Waveforms ................................................................................

 

30

2-8

Time-Base Down-Count Mode Waveforms .............................................................................

 

31

2-9

Time-BaseUp-Down-CountWaveforms, TBCTL[PHSDIR = 0] Count Down On Synchronization Event......

31

2-10

Time-BaseUp-DownCount Waveforms, TBCTL[PHSDIR = 1] Count Up On Synchronization Event.........

32

2-11

Counter-Compare Submodule............................................................................................

 

32

2-12

Detailed View of the Counter-Compare Submodule...................................................................

 

33

2-13

Counter-Compare Event Waveforms in Up-Count Mode .............................................................

 

35

2-14

Counter-Compare Events in Down-Count Mode.......................................................................

 

35

2-15

Counter-CompareEvents InUp-Down-CountMode, TBCTL[PHSDIR = 0] Count Down On

 

 

 

Synchronization Event ....................................................................................................

 

36

2-16

Counter-CompareEvents InUp-Down-CountMode, TBCTL[PHSDIR = 1] Count Up On Synchronization

 

 

Event ........................................................................................................................

 

36

2-17

Action-Qualifier Submodule ...............................................................................................

 

37

2-18

Action-Qualifier Submodule Inputs and Outputs .......................................................................

 

38

2-19

Possible Action-QualifierActions for EPWMxA and EPWMxB Outputs............................................

 

39

2-20

Up-Down-Count Mode Symmetrical Waveform ........................................................................

 

42

2-21

Up, Single Edge Asymmetric Waveform, With Independent Modulation on EPWMxA and

 

 

 

EPWMxB—Active High....................................................................................................

 

43

2-22

Up, Single Edge Asymmetric Waveform With Independent Modulation on EPWMxA and

 

 

 

EPWMxB—Active Low ....................................................................................................

 

44

2-23

Up-Count,Pulse Placement Asymmetric Waveform With Independent Modulation on EPWMxA..............

45

2-24

Up-Down-Count,Dual Edge Symmetric Waveform, With Independent Modulation on EPWMxA and

 

 

EPWMxB — Active Low...................................................................................................

 

47

2-25

Up-Down-Count,Dual Edge Symmetric Waveform, With Independent Modulation on EPWMxA and

 

 

EPWMxB — Complementary .............................................................................................

 

48

2-26

Up-Down-Count,Dual Edge Asymmetric Waveform, With Independent Modulation onEPWMxA—Active

 

 

Low...........................................................................................................................

 

49

2-27

Dead_Band Submodule ...................................................................................................

 

50

2-28

Configuration Options for the Dead-Band Submodule ................................................................

 

51

2-29

Dead-BandWaveforms for Typical Cases (0% < Duty < 100%).....................................................

 

53

2-30

PWM-Chopper Submodule ...............................................................................................

 

55

2-31

PWM-Chopper Submodule Operational Details........................................................................

 

56

2-32

Simple PWM-ChopperSubmodule Waveforms Showing Chopping Action Only..................................

 

56

2-33

PWM-ChopperSubmodule Waveforms Showing the First Pulse and Subsequent Sustaining Pulses.........

57

2-34

PWM-ChopperSubmodule Waveforms Showing the Pulse Width (Duty Cycle) Control of Sustaining

 

 

Pulses........................................................................................................................

 

58

2-35

Trip-Zone Submodule......................................................................................................

 

59

2-36

Trip-Zone Submodule Mode Control Logic .............................................................................

 

62

2-37

Trip-Zone Submodule Interrupt Logic....................................................................................

 

63

2-38

Event-Trigger Submodule .................................................................................................

 

63

2-39

Event-TriggerSubmoduleInter-Connectivityof ADC Start of Conversion and Interrupt Signals................

64

2-40

Event-TriggerSubmodule Showing Event Inputs and Prescaled Outputs..........................................

 

65

2-41

Event-Trigger Interrupt Generator........................................................................................

 

66

2-42

Event-Trigger SOCA Pulse Generator ..................................................................................

 

67

SPRU791D–November2004–RevisedOctober 2007

List of Figures

5

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2-43

Event-Trigger SOCB Pulse Generator ..................................................................................

67

3-1

Simplified ePWM Module..................................................................................................

70

3-2

EPWM1 Configured as a Typical Master, EPWM2 Configured as a Slave ........................................

71

3-3

Control of Four Buck Stages. Here FPWM1¹ FPWM2¹ FPWM3¹ FPWM4 ..................................................

72

3-4

Buck Waveforms for Figure 3-3(Note: Only three bucks shown here).............................................

73

3-5

Control of Four Buck Stages. (Note: FPWM2 = N x FPWM1).............................................................

75

3-6

Buck Waveforms for Figure 3-5 (Note: FPWM2 = FPWM1)) ..............................................................

76

3-7

Control of Two Half-H Bridge Stages (FPWM2 = N x FPWM1) ...........................................................

78

3-8

Half-HBridge Waveforms for Figure3-7(Note: Here FPWM2 = FPWM1 )..............................................

79

3-9

Control of Dual 3-PhaseInverter Stages as Is Commonly Used in Motor Control................................

81

3-10

3-PhaseInverter Waveforms for Figure3-9(Only One Inverter Shown)...........................................

82

3-11

Configuring Two PWM Modules for Phase Control....................................................................

84

3-12

Timing Waveforms Associated With Phase Control Between 2 Modules ..........................................

85

3-13

Control of a 3-Phase Interleaved DC/DC Converter...................................................................

86

3-14

3-PhaseInterleaved DC/DC Converter Waveforms for Figure3-13 ................................................

87

3-15

Controlling a Full-H Bridge Stage (FPWM2 = FPWM1).....................................................................

89

3-16

ZVS Full-H Bridge Waveforms ...........................................................................................

90

4-1

Time-Base Period Register (TBPRD)....................................................................................

94

4-2

Time-Base Phase Register (TBPHS)....................................................................................

94

4-3

Time-Base Counter Register (TBCTR) ..................................................................................

94

4-4

Time-Base Control Register (TBCTL) ...................................................................................

95

4-5

Time-Base Status Register (TBSTS) ....................................................................................

97

4-6

Counter-Compare A Register (CMPA) ..................................................................................

97

4-7

Counter-Compare B Register (CMPB) ..................................................................................

98

4-8

Counter-Compare Control Register (CMPCTL) ........................................................................

99

4-9

Action-Qualifier Output A Control Register (AQCTLA)...............................................................

100

4-10

Action-Qualifier Output B Control Register (AQCTLB)...............................................................

101

4-11

Action-Qualifier Software Force Register (AQSFRC) ................................................................

102

4-12

Action-QualifierContinuous Software Force Register (AQCSFRC)................................................

102

4-13

Dead-Band Generator Control Register (DBCTL)....................................................................

103

4-14

Dead-BandGenerator Rising Edge Delay Register (DBRED)......................................................

105

4-15

Dead-BandGenerator Falling Edge Delay Register (DBFED).....................................................

105

4-16

PWM-Chopper Control Register (PCCTL).............................................................................

105

4-17

Trip-Zone Select Register (TZSEL) ....................................................................................

107

4-18

Trip-Zone Control Register (TZCTL) ...................................................................................

108

4-19

Trip-Zone Enable Interrupt Register (TZEINT)........................................................................

108

4-20

Trip-Zone Flag Register (TZFLG).......................................................................................

109

4-21

Trip-Zone Clear Register (TZCLR) .....................................................................................

110

4-22

Trip-Zone Force Register (TZFRC).....................................................................................

110

4-23

Event-Trigger Selection Register (ETSEL) ............................................................................

111

4-24

Event-Trigger Prescale Register (ETPS) ..............................................................................

112

4-25

Event-Trigger Flag Register (ETFLG)..................................................................................

113

4-26

Event-Trigger Clear Register (ETCLR) ................................................................................

114

4-27

Event-Trigger Force Register (ETFRC)................................................................................

115

6

List of Figures

SPRU791D–November2004–RevisedOctober 2007

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List of Tables

1-1

ePWM Module Control and Status Register Set Grouped by Submodule..........................................

 

18

2-1

Submodule Configuration Parameters...................................................................................

 

20

2-2

Time-Base Submodule Registers ........................................................................................

 

24

2-3

Key Time-Base Signals....................................................................................................

 

25

2-4

Counter-Compare Submodule Registers ...............................................................................

 

33

2-5

Counter-Compare Submodule Key Signals.............................................................................

 

34

2-6

Action-Qualifier Submodule Registers...................................................................................

 

37

2-7

Action-Qualifier Submodule Possible Input Events ....................................................................

 

38

2-8

Action-Qualifier Event Priority for Up-Down-Count Mode.............................................................

 

40

2-9

Action-Qualifier Event Priority for Up-Count Mode.....................................................................

 

40

2-10

Action-Qualifier Event Priority for Down-Count Mode .................................................................

 

40

2-11

Behavior if CMPA/CMPB is Greater than the Period ..................................................................

 

41

2-12

Dead-Band Generator Submodule Registers...........................................................................

 

50

2-13

Classical Dead-Band Operating Modes ................................................................................

 

52

2-14

Dead-BandDelay Values in μS as a Function of DBFED and DBRED............................................

 

54

2-15

PWM-Chopper Submodule Registers ...................................................................................

 

55

2-16

Possible Pulse Width Values for SYSCLKOUT = 100 MHz ..........................................................

 

57

2-17

Trip-Zone Submodule Registers .........................................................................................

 

60

2-18

Possible Actions On a Trip Event ........................................................................................

 

61

2-19

Event-Trigger Submodule Registers ....................................................................................

 

65

4-1

Time-Base Period Register (TBPRD) Field Descriptions .............................................................

 

94

4-2

Time-Base Phase Register (TBPHS) Field Descriptions..............................................................

 

94

4-3

Time-Base Counter Register (TBCTR) Field Descriptions............................................................

 

94

4-4

Time-Base Control Register (TBCTL) Field Descriptions .............................................................

 

95

4-5

Time-Base Status Register (TBSTS) Field Descriptions..............................................................

 

97

4-6

Counter-Compare A Register (CMPA) Field Descriptions ............................................................

 

98

4-7

Counter-Compare B Register (CMPB) Field Descriptions ............................................................

 

98

4-8

Counter-CompareControl Register (CMPCTL) Field Descriptions.................................................

 

99

4-9

Action-QualifierOutput A Control Register (AQCTLA) Field Descriptions.......................................

 

100

4-10

Action-QualifierOutput B Control Register (AQCTLB) Field Descriptions.......................................

 

101

4-11

Action-QualifierSoftware Force Register (AQSFRC) Field Descriptions..........................................

 

102

4-12

Action-qualifierContinuous Software Force Register (AQCSFRC) Field Descriptions..........................

 

103

4-13

Dead-BandGenerator Control Register (DBCTL) Field Descriptions..............................................

 

104

4-14

Dead-BandGenerator Rising Edge Delay Register (DBRED) Field Descriptions...............................

 

105

4-15

Dead-BandGenerator Falling Edge Delay Register (DBFED) Field Descriptions...............................

 

105

4-16

PWM-Chopper Control Register (PCCTL) Bit Descriptions ........................................................

 

105

4-17

Trip-ZoneSubmodule Select Register (TZSEL) Field Descriptions...............................................

 

107

4-18

Trip-Zone Control Register (TZCTL) Field Descriptions .............................................................

 

108

4-19

Trip-ZoneEnable Interrupt Register (TZEINT) Field Descriptions.................................................

 

108

4-20

Trip-Zone Flag Register (TZFLG) Field Descriptions ................................................................

 

109

4-21

Trip-Zone Clear Register (TZCLR) Field Descriptions ..............................................................

 

110

4-22

Trip-Zone Force Register (TZFRC) Field Descriptions ..............................................................

 

110

4-23

Event-TriggerSelection Register (ETSEL) Field Descriptions.....................................................

 

111

4-24

Event-TriggerPrescale Register (ETPS) Field Descriptions.......................................................

 

112

4-25

Event-Trigger Flag Register (ETFLG) Field Descriptions ...........................................................

 

114

4-26

Event-Trigger Clear Register (ETCLR) Field Descriptions ..........................................................

 

114

4-27

Event-Trigger Force Register (ETFRC) Field Descriptions .........................................................

 

115

A-1

Changes for Revision D..................................................................................................

 

117

SPRU791D–November2004–RevisedOctober 2007

List of Tables

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List of Tables

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Preface

SPRU791D–November2004–RevisedOctober 2007

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This guide describes the Enhanced Pulse Width Modulator (ePWM) Module. It includes an overview of the module and information about each of the sub-modules:

Time-BaseModule

Counter Compare Module

Action Qualifier Module

Dead-BandGenerator Module

PWM Chopper (PC) Module

Trip Zone Module

Event Trigger Module

Related Documentation From Texas Instruments

The following books describe the TMS320x280x and related support tools that are available on the TI website:

Data Manuals—

SPRS230— TMS320F2809, F2808, F2806, F2802, F2801, C2802, C2801, and F2801x DSPs Data Manual contains the pinout, signal descriptions, as well as electrical and timing specifications for the F280x devices.

SPRS357— TMS320F28044 Digital Signal Processor Data Manual contains the pinout, signal descriptions, as well as electrical and timing specifications for the F28044 device.

CPU User's Guides—

SPRU430— TMS320C28x DSP CPU and Instruction Set Reference Guide describes the central processing unit (CPU) and the assembly language instructions of the TMS320C28x fixed-point digital signal processors (DSPs). It also describes emulation features available on these DSPs.

SPRU712— TMS320x280x, 2801x, 2804x System Control and Interrupts Reference Guide describes the various interrupts and system control features of the 280x digital signal processors (DSPs).

Peripheral Guides—

SPRU566— TMS320x28xx, 28xxx Peripheral Reference Guide describes the peripheral reference guides of the 28x digital signal processors (DSPs).

SPRU716— TMS320x280x, 2801x, 2804x Analog-to-Digital Converter (ADC) Reference Guide describes how to configure and use the on-chip ADC module, which is a 12-bit pipelined ADC.

SPRU791— TMS320x28xx, 28xxx Enhanced Pulse Width Modulator (ePWM) Module Reference Guide describes the main areas of the enhanced pulse width modulator that include digital motor control, switch mode power supply control, UPS (uninterruptible power supplies), and other forms of power conversion

SPRU924— TMS320x28xx, 28xxx High-Resolution Pulse Width Modulator (HRPWM) describes the operation of the high-resolution extension to the pulse width modulator (HRPWM)

SPRU807— TMS320x28xx, 28xxx Enhanced Capture (eCAP) Module Reference Guide describes the enhanced capture module. It includes the module description and registers.

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Related Documentation From Texas Instruments

SPRU790— TMS320x28xx, 28xxx Enhanced Quadrature Encoder Pulse (eQEP) Reference Guide describes the eQEP module, which is used for interfacing with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine in high performance motion and position control systems. It includes the module description and registers

SPRU074— TMS320x28xx, 28xxx Enhanced Controller Area Network (eCAN) Reference Guide describes the eCAN that uses established protocol to communicate serially with other controllers in electrically noisy environments.

SPRU051— TMS320x28xx, 28xxx Serial Communication Interface (SCI) Reference Guide describes the SCI, which is a two-wire asynchronous serial port, commonly known as a UART. The SCI modules support digital communications between the CPU and other asynchronous peripherals that use the standard non-return-to-zero (NRZ) format.

SPRU059— TMS320x28xx, 28xxx Serial Peripheral Interface (SPI) Reference Guide describes the SPI - a high-speed synchronous serial input/output (I/O) port - that allows a serial bit stream of programmed length (one to sixteen bits) to be shifted into and out of the device at a programmed bit-transfer rate.

SPRU721— TMS320x28xx, 28xxx Inter-Integrated Circuit (I2C) Reference Guide describes the features and operation of the inter-integrated circuit (I2C) module that is available on the TMS320x280x digital signal processor (DSP).

SPRU722— TMS320x280x, 2801x, 2804x Boot ROM Reference Guide describes the purpose and features of the bootloader (factory-programmed boot-loading software). It also describes other contents of the device on-chip boot ROM and identifies where all of the information is located within that memory.

Tools Guides—

SPRU513— TMS320C28x Assembly Language Tools User's Guide describes the assembly language tools (assembler and other tools used to develop assembly language code), assembler directives, macros, common object file format, and symbolic debugging directives for the TMS320C28x device.

SPRU514— TMS320C28x Optimizing C Compiler User's Guide describes the TMS320C28x™ C/C++ compiler. This compiler accepts ANSI standard C/C++ source code and produces TMS320 DSP assembly language source code for the TMS320C28x device.

SPRU608— The TMS320C28x Instruction Set Simulator Technical Overview describes the simulator, available within the Code Composer Studio for TMS320C2000 IDE, that simulates the instruction set of the C28x™ core.

SPRU625— TMS320C28x DSP/BIOS Application Programming Interface (API) Reference Guide describes development using DSP/BIOS.

Application Reports—

SPRAAM0— Getting Started With TMS320C28x™ Digital Signal Controllers is organized by development flow and functional areas to make your design effort as seamless as possible. Tips on getting started with C28x™ DSP software and hardware development are provided to aid in your initial design and debug efforts. Each section includes pointers to valuable information including technical documentation, software, and tools for use in each phase of design.

SPRAAD5— Power Line Communication for Lighting Apps using BPSK w/ a Single DSP Controller presents a complete implementation of a power line modem following CEA-709 protocol using a single DSP.

SPRAA85— Programming TMS320x28xx and 28xxx Peripherals in C/C++ explores a hardware abstraction layer implementation to make C/C++ coding easier on 28x DSPs. This method is compared to traditional #define macros and topics of code efficiency and special case registers are also addressed.

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Related Documentation From Texas Instruments

SPRA958— Running an Application from Internal Flash Memory on the TMS320F28xx DSP covers the requirements needed to properly configure application software for execution from on-chip flash memory. Requirements for both DSP/BIOS™ and non-DSP/BIOS projects are presented. Example code projects are included.

SPRAA91— TMS320F280x DSC USB Connectivity Using TUSB3410 USB-to-UART Bridge Chip presents hardware connections as well as software preparation and operation of the development system using a simple communication echo program.

SPRAA58— TMS320x281x to TMS320x280x Migration Overview describes differences between the Texas Instruments TMS320x281x and TMS320x280x DSPs to assist in application migration from the 281x to the 280x. While the main focus of this document is migration from 281x to 280x, users considering migrating in the reverse direction (280x to 281x) will also find this document useful.

SPRAAD8— TMS320280x and TMS320F2801x ADC Calibration describes a method for improving the absolute accuracy of the 12-bit ADC found on the TMS320280x and TMS3202801x devices. Inherent gain and offset errors affect the absolute accuracy of the ADC. The methods described in this report can improve the absolute accuracy of the ADC to levels better than 0.5%. This application report has an option to download an example program that executes from RAM on the F2808 EzDSP.

SPRAAI1— Using Enhanced Pulse Width Modulator (ePWM) Module for 0-100% Duty Cycle Control provides a guide for the use of the ePWM module to provide 0% to 100% duty cycle control and is applicable to the TMS320x280x family of processors.

SPRAA88— Using PWM Output as a Digital-to-Analog Converter on a TMS320F280x presents a method for utilizing the on-chip pulse width modulated (PWM) signal generators on the TMS320F280x family of digital signal controllers as a digital-to-analog converter (DAC).

SPRAAH1— Using the Enhanced Quadrature Encoder Pulse (eQEP) Module provides a guide for the use of the eQEP module as a dedicated capture unit and is applicable to the TMS320x280x, 28xxx family of processors.

SPRA820— Online Stack Overflow Detection on the TMS320C28x DSP presents the methodology for online stack overflow detection on the TMS320C28x™ DSP. C-source code is provided that contains functions for implementing the overflow detection on both DSP/BIOS™ and non-DSP/BIOS applications.

SPRA806— An Easy Way of Creating a C-callable Assembly Function for the TMS320C28x DSP provides instructions and suggestions to configure the C compiler to assist with understanding of parameter-passing conventions and environments expected by the C compiler.

Trademarks

TMS320C28x, C28x are trademarks of Texas Instruments.

SPRU791D–November2004–RevisedOctober 2007

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SPRU791D–November2004–RevisedOctober 2007

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