Sony DX4, AR-B1474, 486DX User Manual

0 (0)

AR-B1474

INDUSTRIAL GRADE 486DX/DX2/DX4 CPU CARD User’ s Guide

Edition: 3.1

Book Number: AR-B1474-99.B01

AR-B1474 User¡¦s Guide

Table of Contents

0. PREFACE.......................................................................................................................................................

0-3

0.1

COPYRIGHT NOTICE AND DISCLAIMER ................................................................................................................................

0-3

0.2

WELCOME TO THE AR-B1474 SERIAL CPU BOARD.............................................................................................................

0-3

0.3

BEFORE YOU USE THIS GUIDE...............................................................................................................................................

0-3

0.4

RETURNING YOUR BOARD FOR SERVICE............................................................................................................................

0-3

0.5

TECHNICAL SUPPORT AND USER COMMENTS ...................................................................................................................

0-3

0.6

ORGANIZATION..........................................................................................................................................................................

0-4

0.7

STATIC ELECTRICITY PRECAUTIONS....................................................................................................................................

0-4

1. OVERVIEW.....................................................................................................................................................

1-1

1.1

INTRODUCTION .........................................................................................................................................................................

1-1

1.2

PACKING LIST ............................................................................................................................................................................

1-2

1.3

FEATURES ..................................................................................................................................................................................

1-2

2. SYSTEM CONTROLLER ................................................................................................................................

2-1

2.1

DMA CONTROLLER ...................................................................................................................................................................

2-1

2.2

KEYBOARD CONTROLLER.........................................................................................................................................................

2-1

2.3

INTERRUPT CONTROLLER ......................................................................................................................................................

2-2

2.3.1

I/O Port Address Map ..........................................................................................................................................................

2-3

2.3.2

Real-Time Clock and Non-Volatile RAM ............................................................................................................................

2-4

2.3.3

Timer ....................................................................................................................................................................................

2-4

2.3.4

ISA Bus Pin Assignment .....................................................................................................................................................

2-5

2.3.5

ISA Bus Signal Description .................................................................................................................................................

2-6

2.4

SERIAL PORT .............................................................................................................................................................................

2-7

2.5

PARALLEL PORT........................................................................................................................................................................

2-9

3. SETTING UP THE SYSTEM............................................................................................................................

3-1

3.1

OVERVIEW..................................................................................................................................................................................

3-1

3.2

SYSTEM SETTING .....................................................................................................................................................................

3-2

3.2.1

 

Serial Port ............................................................................................................................................................................

3-2

3.2.2

 

Hard Disk (IDE) Connector (CN1).......................................................................................................................................

3-3

3.2.3

 

Power Connector (J5) .........................................................................................................................................................

3-3

3.2.4

 

FDD Port Connector (CN2) .................................................................................................................................................

3-4

3.2.5

 

Parallel Port Connector (CN3) ............................................................................................................................................

3-4

3.2.6

 

PC/104 Connector ...............................................................................................................................................................

3-5

3.2.7

 

CPU Setting .........................................................................................................................................................................

3-7

3.2.8

 

Memory Setting....................................................................................................................................................................

3-9

3.2.9

 

LED Header (J1, J2 & J4) .................................................................................................................................................

3-10

3.2.10

Keyboard Connector .....................................................................................................................................................

3-10

3.2.11

External Speaker Header (J3) ......................................................................................................................................

3-11

3.2.12

Reset Header (J7) .........................................................................................................................................................

3-11

3.2.13

Battery Setting ...............................................................................................................................................................

3-11

3.2.14

CRT Display Type Select (JP13)..................................................................................................................................

3-11

4. INSTALLATION ..............................................................................................................................................

4-1

4.1

OVERVIEW..................................................................................................................................................................................

4-1

4.2

UTILITY DISKETTE.....................................................................................................................................................................

4-2

4.3

WRITE PROTECT FUNCTION...................................................................................................................................................

4-5

4.3.1

Hardware Write Protect .......................................................................................................................................................

4-5

4.3.2

Software Write Protect ........................................................................................................................................................

4-5

4.3.3

Enable the Software Write Protect......................................................................................................................................

4-5

4.3.4

Disable the Software Write Protect .....................................................................................................................................

4-5

4.4

WATCHDOG TIMER ...................................................................................................................................................................

4-6

4.4.1

Watchdog Timer Setting......................................................................................................................................................

4-6

4.4.2

Watchdog Timer Enabled....................................................................................................................................................

4-7

4.4.3

Watchdog Timer Trigger......................................................................................................................................................

4-7

4.4.4

Watchdog Timer Disabled ...................................................................................................................................................

4-7

5. SOLID STATE DISK .......................................................................................................................................

5-1

5.1

OVERVIEW..................................................................................................................................................................................

5-1

5.2

SWITCH SETTING......................................................................................................................................................................

5-1

5.2.1

Overview ..............................................................................................................................................................................

5-2

5.2.2

I/O Port Address Select (SW1-1 & SW1-2) ........................................................................................................................

5-2

5.2.3

SSD Firmware Address Select (SW1-3 & SW1-4).............................................................................................................

5-2

5.2.4

SSD Drive Number (SW1-5 & SW1-6) ...............................................................................................................................

5-3

5.2.5

ROM Type Select (SW1-7 & SW1-8)..................................................................................................................................

5-4

5.3

JUMPER SETTING .....................................................................................................................................................................

5-5

5.3.1

SSD BIOS Select (JP7).......................................................................................................................................................

5-5

5.3.2

SSD Memory Type Setting (M1 ~ M3 & JP5).....................................................................................................................

5-6

0-1

AR-B1474 User¡¦s Guide

 

5.4

ROM DISK INSTALLATION ........................................................................................................................................................

5-6

 

5.4.1

UV EPROM (27Cxxx)..........................................................................................................................................................

5-6

 

5.4.2

Large Page 5V FLASH Disk................................................................................................................................................

5-8

 

5.4.3

Small Page 5V FLASH ROM Disk ......................................................................................................................................

5-9

 

5.4.4

RAM Disk ...........................................................................................................................................................................

5-11

 

5.4.5

Combination of ROM and RAM Disk ................................................................................................................................

5-12

 

5.5

INSTALLATION D.O.C. .............................................................................................................................................................

5-12

 

5.5.1

Hardware Setting ...............................................................................................................................................................

5-12

 

5.5.2

Software Setting ................................................................................................................................................................

5-13

6.

BIOS CONSOLE .............................................................................................................................................

6-1

 

6.1

BIOS SETUP OVERVIEW ..........................................................................................................................................................

6-1

 

6.2

STANDARD CMOS SETUP........................................................................................................................................................

6-2

 

6.3

ADVANCED CMOS SETUP........................................................................................................................................................

6-3

 

6.4

ADVANCED CHIPSET SETUP...................................................................................................................................................

6-5

 

6.5

POWER MANAGEMENT ............................................................................................................................................................

6-6

 

6.6

AUTO-DETECT HARD DISKS....................................................................................................................................................

6-7

 

6.7

PASSWORD SETTING...............................................................................................................................................................

6-7

 

6.7.1

Setting Password.................................................................................................................................................................

6-7

 

6.7.2

Password Checking.............................................................................................................................................................

6-7

 

6.8

LOAD DEFAULT SETTING.........................................................................................................................................................

6-7

 

6.8.1

Auto Configuration with Optimal Setting.............................................................................................................................

6-7

 

6.8.2

Auto Configuration with Fail Safe Setting ...........................................................................................................................

6-7

 

6.9

BIOS EXIT....................................................................................................................................................................................

6-8

 

6.9.1

Save Settings and Exit ........................................................................................................................................................

6-8

 

6.9.2

Exit Without Saving .............................................................................................................................................................

6-8

7.

SPECIFICATIONS ..........................................................................................................................................

7-1

8.

PLACEMENT & DIMENSIONS........................................................................................................................

8-1

 

8.1

PLACEMENT ...............................................................................................................................................................................

8-1

 

8.2

DIMENSIONS ..............................................................................................................................................................................

8-2

9. MEMORY BANKS & PROGRAMMING RS-485 ...............................................................................................

9-1

 

9.1

USING MEMORY BANK .............................................................................................................................................................

9-1

 

9.2

PROGRAMMING RS-485 ...........................................................................................................................................................

9-2

10. SSD TYPES SUPPORTED & INDEX ..........................................................................................................

10-1

 

10.1

SSD TYPES SUPPORTED...................................................................................................................................................

10-1

 

10.2

INDEX ....................................................................................................................................................................................

10-3

0-2

AR-B1474 User¡¦s Guide

0.PREFACE

0.1 COPYRIGHT NOTICE AND DISCLAIMER

September 1995

Acrosser Technology makes no representations or warranties with respect to the contents hereof and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose. Furthermore, Acrosser Technology reserves the right to revise this publication and to make changes from time to time in the contents hereof without obligation of Acrosser Technology to notify any person of such revisions or changes.

Possession, use, or copying of the software described in this publication is authorized only pursuant to a valid written license from Acrosser or an authorized sublicensor.

(C) Copyright Acrosser Technology Co., Ltd., 1995. All rights Reserved.

No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or any means, electronic, mechanical, magnetic, optical, chemical, manual or otherwise, without the prior written consent of Acrosser Technology.

Acrosser, IBM, INTEL, AMD, CYRIX, AMI, MS-DOS, PC-DOS, DR-DOS, X-DOS…a re registered trademarks. All other trademarks and registered trademarks are the property of their respective holders.

This document was produced with Adobe Acrobat 3.01.

0.2 WELCOME TO THE AR-B1474 SERIAL CPU BOARD

This guide introduces the Acrosser AR-B1474 serial CPU board.

Use the information describes this card’ s functions, features, and how to start, set up and operate your AR-B1474 serial CPU board. You also could find general system information here.

0.3 BEFORE YOU USE THIS GUIDE

If you have not already installed this AR-B1474, refer to the Chapter 3, “Setting Up the System” in this guide. Check the packing list, make sure the accessories in the package.

AR-B1474 diskette provides the newest information about the card. Please refer to the README.DOC file of the enclosed utility diskette. It contains the modification and hardware & software information, and adding the description or modification of product function after manual published.

0.4 RETURNING YOUR BOARD FOR SERVICE

If your board requires servicing, contact the dealer from whom you purchased the product for service information. If you need to ship your board to us for service, be sure it is packed in a protective carton. We recommend that you keep the original shipping container for this purpose.

You can help assure efficient servicing of your product by following these guidelines:

1.Include your name, address, telephone and facsimile number where you may be reached during the day.

2.A description of the system configuration and/or software at the time is malfunction.

3.A brief description is in the symptoms.

0.5TECHNICAL SUPPORT AND USER COMMENTS

User’ s comments are always welcome as they assist us in improving the usefulness of our products and the understanding of our publications. They form a very important part of the input used for product enhancement and revision.

We may use and distribute any of the information you supply in any way we believe appropriate without incurring any obligation. You may, of course, continue to use the information you supply.

If you have suggestions for improving particular sections or if you find any errors, please indicate the manual title and book number.

Please send your comments to Acrosser Technology Co., Ltd. or your local sales representative. Internet electronic mail to: webmaster@acrosser.com

0-3

AR-B1474 User¡¦s Guide

0.6 ORGANIZATION

This information for users covers the following topics (see the Table of Contents for a detailed listing):

Chapter 1, “Overview” , provides an overview of the system features and packing list.

Chapter 2, “System Controller” describes the major structure.

Chapter 3, “Setting Up the System”, describes how to adjust the jumper, and the connectors setting.

Chapter 4, “Installation”, describes setup procedures including information on the utility diskette.

Chapter 5, “Solid State Disk,” describes the various type SSD’ s installation steps.

Chapter 6, “BIOS Console”, providing the BIOS options setting.

Chapter 7, Specifications

Chapter 8, Placement & Dimensions

Chapter 9, Memory Banks & Programming RS-485

Chapter 10, SSD Types Supported & Index

0.7STATIC ELECTRICITY PRECAUTIONS

Before removing the board from its anti-static bag, read this section about static electricity precautions.

Static electricity is a constant danger to computer systems. The charge that can build up in your body may be more than sufficient to damage integrated circuits on any PC board. It is, therefore, important to observe basic precautions whenever you use or handle computer components. Although areas with humid climates are much less prone to static build-up, it is always best to safeguard against accidents may result in expensive repairs. The following measures should generally be sufficient to protect your equipment from static discharge:

Touch a grounded metal object to discharge the static electricity in your body (or ideally, wear a grounded wrist strap).

When unpacking and handling the board or other system component, place all materials on an antic static surface.

Be careful not to touch the components on the board, especially the “golden finger” connectors on the bottom of every board.

0-4

AR-B1474 User¡¦s Guide

1. OVERVIEW

This chapter provides an overview of your system features and capabilities. The following topics are covered:

Introduction

Packing List

Features

1.1INTRODUCTION

The AR-B1474 is a half size industrial grade CPU card that has been designed to withstand continuous operation in harsh environments. The total on-board memory for the AR-B1474 can be configured from 1MB to 32MB by using all 72-pin type DRAM devices.

The 8 layers PCB CPU card is equipped with a IDE HDD interface, a floppy disk drive adapter, 1 parallel port, 2 serial ports, a watchdog timer and a solid state disk. Its dimensions are as compact as 122mm x 185mm. It’ s highly condensed features make it an ideal cost/performance solution for high-end commercial and industrial applications where CPU speed and mean time between failure is critical.

The AR-B1474 provides 2 bus interfaces, ISA bus and PC/104 compatible expansion bus. Based on the PC/104 expansion bus, you could easy install thousands of PC/104 module from hundreds venders around the world. You could also directly connect the power supply to the AR-B1474 on-board power connector in stand alone applications.

A watchdog timer, which has a software programmable time-out interval, is also provided on this CPU card. It ensures that the system will not hang-up if a program can not execute normally.

For diskless application, the AR-B1474 provides up to 3MB of bootable ROM, FLASH, or SRAM disk space by using 64K x 8 to 1M x 8 memory chips.

The AR-B1474 is implemented with M1429 and M1431 chipset incorporate a memory controller, parity generation and checking, two 8237 DMA controllers, two 8259 interrupt controllers, one 8254 timer/counter, an address buffer and a data buffer.

A super I/O chip (SMC37C669) is embedded in the AR-B1474 card. It combines functions of a floppy disk drive adapter, a hard disk drive (IDE) adapter, two serial (with 16C550 UART) adapters and 1 parallel adapter.

The I/O port configurations can be done by setting the BIOS setup program.

As an UART, the chip supports serial to parallel conversion on data characters received from a peripheral device or a MODEM , and parallel to serial conversion on data character received from the CPU. The UART includes a programmable baud rate generator, complete MODEM control capability and a processor interrupt system. As a parallel port, the SMC37C669 provides the user with a fully bi-directional parallel centronics-type printer interface.

This manual has been written to assist you in installing, configuring and running the AR-B1474 CPU card. Each section is intended to guide you through it’ s procedures clearly and concisely, allowing you to continue to the next chapters without any difficulty.

1-1

AR-B1474 User¡¦s Guide

1.2 PACKING LIST

The accessories are included with the system. Before you begin installing your AR-B1474 card, take a moment to make sure that the following items have been included inside the AR-B1474 package.

The quick setup manual

1 AR-B1474 all-in-one CPU card

1 Keyboard adapter cable

1 Parallel port interface cable

1 Hard disk drive interface cable

1 Floppy disk drive interface cable

1 40-pin header for PC/104 adapter

1 64-pin header for PC/104 adapter

1 Software utility diskettes

NOTE: If there are any discrepancies, please contact your Acrosser distributor immediately.

1.3 FEATURES

The system provides a number of special features that enhance its reliability, ensure its availability, and improve its expansion capabilities, as well as its hardware structure.

All-in-one designed 486DX/DX2/DX4 CPU card

Support 3.3V/5V CPU with voltage regulator

Support ISA bus and PC/104 bus

Support 128KB to 512KB second level cache on-board

Support up to 32MB DRAM on-board

Support shadow memory and EMS

Legal AMI BIOS

IDE hard disk drive interface

Floppy disk drive interface

Bi-direction parallel interface

2 serial ports with 16C550 UART

DS12887 or compatible RTC

Programmable watchdog timer

Up to 3MB solid state disk (SSD)

On-board build-in buzzer

8 layers PCB

1-2

AR-B1474 User¡¦s Guide

2. SYSTEM CONTROLLER

This chapter describes the major structure of the AR-B1474 serial CPU board. The following topics are covered:

DMA Controller

Keyboard Controller

Interrupt Controller

Serial Port

Parallel Port

2.1DMA CONTROLLER

The equivalent of two 8237A DMA controllers are implemented in the AR-B1474 card. Each controller is a fourchannel DMA device that will generate the memory addresses and control signals necessary to transfer information directly between a peripheral device and memory. This allows high-speed information transfer with less CPU intervention. The two DMA controllers are internally cascaded to provide four DMA channels for transfers to 8-bit peripherals (DMA1) and three channels for transfers to 16-bit peripherals (DMA2). DMA2 channel 0 provides the cascade interconnection between the two DMA devices, thereby maintaining IBM PC/AT compatibility.

Following is the system information of DMA channels:

DMA Controller 1

DMA Controller 2

Channel 0: Spare

Channel 4: Cascade for controller 1

Channel 1: IBM SDLC

Channel 5: Spare

Channel 2: Diskette adapter

Channel 6: Spare

Channel 3: Spare

Channel 7: Spare

Table 2-1 DMA Channel Controller

2.2 KEYBOARD CONTROLLER

The 8042 processor is programmed to support the serial keyboard serial interface. The keyboard controller receives serial data from the keyboard, checks its parity, translates scan codes, and presents it to the system as a byte data in its output buffer. The controller can interrupt the system when data is placed in its output buffer, or wait for the system to poll its status register to determine when data is available.

Data can be written to the keyboard by writing data to the output buffer of the keyboard controller.

Each byte of data is sent to the keyboard controller in series with an odd parity bit automatically inserted. The keyboard controller is required to acknowledge all data transmissions. Therefore, another byte of data will not be sent to keyboard controller until acknowledgment is received for the previous byte sent. The “output buffer full” interrupt may be used for both send and receive routines.

2-1

AR-B1474 User¡¦s Guide

2.3 INTERRUPT CONTROLLER

The equivalent of two 8259 Programmable Interrupt Controllers (PIC) are included on the AR-B1474 card. They accept requests from peripherals, resolve priorities on pending interrupts in service, issue interrupt requests to the CPU, and provide vectors which are used as acceptance indices by the CPU to determine which interrupt service routine to execute.

Following is the system information of interrupt levels:

Interrupt Level

 

Description

 

 

 

 

 

 

 

NMI

 

Parity check

CTRL1

 

CTRL2

IRQ 0

System timer interrupt from timer 8254

IRQ 1

Keyboard output buffer full

IRQ 2

 

 

 

 

 

IRQ8 : Real time clock

 

 

 

 

 

 

 

 

 

IRQ9 : Rerouting to INT 0Ah from hardware IRQ2

 

 

 

IRQ10 : Spare

 

 

 

IRQ11 : Spare

 

 

 

IRQ12 : Spare

 

 

 

IRQ13 : Math. coprocessor

 

 

 

IRQ14 : Hard disk adapter

 

 

 

IRQ15 : Spare (Watchdog Timer)

 

 

 

IRQ 3

 

Serial port 2

IRQ 4

 

Serial port 1

IRQ 5

 

Parallel port 2

IRQ 6

 

Floppy disk adapter

IRQ 7

 

Parallel port 1

 

 

 

Figure 2-1 Interrupt Controller

2-2

AR-B1474 User¡¦s Guide

2.3.1 I/O Port Address Map

Hex Range

Device

000-01F

DMA controller 1

020-021

Interrupt controller 1

022-023

M1429 chipset address

040-04F

Timer 1

050-05F

Timer 2

060-06F

8042 keyboard/controller

070-071

Real-time clock (RTC), non-maskable interrupt (NMI)

080-09F

DMA page registers

0A0-0A1

Interrupt controller 2

0C0-0DF

DMA controller 2

0F0

Clear Math Co-processor

0F1

Reset Math Co-processor

0F8-0FF

Math Co-processor

170-178

Fixed disk 1

1F0-1F8

Fixed disk 0

201

Game port

208-20A

EMS register 0

210-213

SSD

214-215

Watchdog

218-21A

EMS register 1

278-27F

Parallel printer port 3 (LPT 3)

290-293

SSD

294-295

Watchdog

2E8-2EF

Serial port 4 (COM 4)

2F8-2FF

Serial port 2 (COM 2)

310-313

SSD

314-315

Watchdog

378-37F

Parallel printer port 2 (LPT 2)

380-38F

SDLC, bisynchronous 2

390-393

SSD

394-395

Watchdog

3A0-3AF

Bisynchronous 1

3B0-3BF

Monochrome display and printer port 1 (LPT 1)

3C0-3CF

EGA/VGA adapter

3D0-3DF

Color/graphics monitor adapter

3E8-3EF

Serial port 3 (COM 3)

3F0-3F7

Diskette controller

3F8-3FF

Serial port 1 (COM 1)

Table 2-2 I/O Port Address Map

2-3

AR-B1474 User¡¦s Guide

2.3.2 Real-Time Clock and Non-Volatile RAM

The AR-B1474 contains a real-time clock compartment that maintains the date and time in addition to storing configuration information about the computer system. It contains 14 bytes of clock and control registers and 114 bytes of general purpose RAM. Because of the use of CMOS technology, it consumes very little power and can be maintained for long period of time using an internal Lithium battery. The contents of each byte in the CMOS RAM are listed as follows:

Address

Description

00

Seconds

01

Second alarm

02

Minutes

03

Minute alarm

04

Hours

05

Hour alarm

06

Day of week

07

Date of month

08

Month

09

Year

0A

Status register A

0B

Status register B

0C

Status register C

0D

Status register D

0E

Diagnostic status byte

0F

Shutdown status byte

10

Diskette drive type byte, drive A and B

11

Fixed disk type byte, drive C

12

Fixed disk type byte, drive D

13

Reserved

14

Equipment byte

15

Low base memory byte

16

High base memory byte

17

Low expansion memory byte

18

High expansion memory byte

19-2D

Reserved

2E-2F

2-byte CMOS checksum

30

Low actual expansion memory byte

31

High actual expansion memory byte

32

Date century byte

33

Information flags (set during power on)

34-7F

Reserved for system BIOS

Table 2-3 Real-Time Clock & Non-Volatile RAM

2.3.3 Timer

The AR-B1474 provides three programmable timers, each with a timing frequency of 1.19 MHz.

Timer 0 The output of this timer is tied to interrupt request 0. (IRQ 0)

Timer 1 This timer is used to trigger memory refresh cycles.

Timer 2 This timer provides the speaker tone.

Application programs can load different counts into this timer to generate various sound frequencies.

2-4

AR-B1474 User¡¦s Guide

2.3.4 ISA Bus Pin Assignment

I/O Pin

Signal Name

Input/Output

I/O Pin

Signal Name

Input/Output

A1

-IOCHCK

Input

B1

GND

Ground

A2

SD7

Input/Output

B2

RSTDRV

Output

A3

SD6

Input/Output

B3

+5V

Power

A4

SD5

Input/Output

B4

IRQ9

Input

A5

SD4

Input/Output

B5

-5V

Power

A6

SD3

Input/Output

B6

DRQ2

Input

A7

SD2

Input/Output

B7

-12V

Power

A8

SD1

Input/Output

B8

-ZWS

Input

A9

SD0

Input/Output

B9

+12V

Power

A10

IOCHRDY

Input

B10

GND

Ground

A11

AEN

Output

B11

-SMEMW

Output

A12

SA19

Input/Output

B12

-SMEMR

Output

A13

SA18

Input/Output

B13

-IOW

Input/Output

A14

SA17

Input/Output

B14

-IOR

Input/Output

A15

SA16

Input/Output

B15

-DACK3

Output

A16

SA15

Input/Output

B16

DRQ3

Input

A17

SA14

Input/Output

B17

-DACK1

Output

A18

SA13

Input/Output

B18

DRQ1

Input

A19

SA12

Input/Output

B19

-REFRESH

Input/Output

A20

SA11

Input/Output

B20

BUSCLK

Output

A21

SA10

Input/Output

B21

IRQ7

Input

A22

SA9

Input/Output

B22

IRQ6

Input

A23

SA8

Input/Output

B23

IRQ5

Input

A24

SA7

Input/Output

B24

IRQ4

Input

A25

SA6

Input/Output

B25

IRQ3

Input

A26

SA5

Input/Output

B26

-DACK2

Output

A27

SA4

Input/Output

B27

TC

Output

A28

SA3

Input/Output

B28

BALE

Output

A29

SA2

Input/Output

B29

+5V

Power

A30

SA1

Input/Output

B30

OSC

Output

A31

SA0

Input/Output

B31

GND

Ground

Table 2-4 ISA Bus Pin Assignment

 

 

I/O Pin

Signal Name

Input/Output

I/O Pin

Signal Name

Input/Output

C1

SBHE

Input/Output

D1

-MEMCS16

Input

C2

LA23

Input/Output

D2

-IOCS16

Input

C3

LA22

Input/Output

D3

IRQ10

Input

C4

LA21

Input/Output

D4

IRQ11

Input

C5

LA20

Input/Output

D5

IRQ12

Input

C6

LA19

Input/Output

D6

IRQ15

Input

C7

LA18

Input/Output

D7

IRQ14

Input

C8

LA17

Input/Output

D8

-DACK0

Output

C9

-MEMR

Input/Output

D9

DRQ0

Input

C10

-MEMW

Input/Output

D10

-DACK5

Output

C11

SD8

Input/Output

D11

DRQ5

Input

C12

SD9

Input/Output

D12

-DACK6

Output

C13

SD10

Input/Output

D13

DRQ6

Input

C14

SD11

Input/Output

D14

-DACK7

Output

C15

SD12

Input/Output

D15

DRQ7

Input

C16

SD13

Input/Output

D16

+5V

Power

C17

SD14

Input/Output

D17

-MASTER

Input

C18

SD15

Input/Output

D18

GND

Ground

Table 2-5 ISA Bus Pin Assignment

2-5

AR-B1474 User¡¦s Guide

2.3.5 ISA Bus Signal Description

Name

Description

BUSCLK [Output]

The BUSCLK signal of the I/O channel is asynchronous to

 

the CPU clock.

 

 

RSTDRV [Output]

This signal goes high during power-up, low line-voltage or

 

hardware reset

 

 

SA0 - SA19

The System Address lines run from bit 0 to 19. They are

[Input / Output]

latched onto the falling edge of "BALE"

LA17 - LA23

The Unlatched Address line run from bit 17 to 23

[Input/Output]

 

SD0 - SD15

System Data bit 0 to 15

[Input/Output]

 

BALE [Output]

The Buffered Address Latch Enable is used to latch SA0 -

 

SA19 onto the falling edge. This signal is forced high

 

during DMA cycles

-IOCHCK [Input]

The I/O Channel Check is an active low signal which

 

indicates that a parity error exist on the I/O board

IOCHRDY

This signal lengthens the I/O, or memory read/write cycle,

[Input, Open

and should be held low with a valid address

collector]

 

IRQ 3-7, 9-12, 14, 15

The Interrupt Request signal indicates I/O service request

[Input]

attention. They are prioritized in the following sequence :

 

(Highest) IRQ 9, 10, 11, 12, 13, 15, 3, 4, 5, 6, 7 (Lowest)

-IOR

The I/O Read signal is an active low signal which instructs

[Input/Output]

the I/O device to drive its data onto the data bus

-IOW [Input/Output]

The I/O write signal is an active low signal which instructs

 

the I/O device to read data from the data bus

-SMEMW [Output]

The System Memory Read is low while any of the low 1

 

mega bytes of memory are being used

-MEMR

The Memory Read signal is low while any memory

[Input/Output]

location is being read

-SMEMW [Output]

The System Memory Write is low while any of the low 1

 

mega bytes of memory is being written

-MEMW

The Memory Write signal is low while any memory

[Input/Output]

location is being written

DRQ 0-3, 5-7

DMA Request channels 0 to 3 are for 8-bit data transfers.

[Input]

DMA Request channels 5 to 7 are for 16-bit data

 

transfers. DMA request should be held high until the

 

corresponding DMA has been completed. DMA request

 

priority is in the following sequence:(Highest) DRQ 0, 1, 2,

 

3, 5, 6, 7 (Lowest)

-DACK 0-3, 5-7

The DMA Acknowledges 0 to 3, 5 to 7 are the

[Output]

corresponding acknowledge signals for DRQ 0 to 3 and 5

 

to 7

AEN [output]

The DMA Address Enable is high when the DMA

 

controller is driving the address bus. It is low when the

 

CPU is driving the address bus

-REFRESH

This signal is used to indicate a memory refresh cycle and

[Input/Output]

can be driven by the microprocessor on the I/O channel

TC [Output]

Terminal Count provides a pulse when the terminal count

 

for any DMA channel is reached

SBHE

The System Bus High Enable indicates the high byte SD8

[Input/Output]

- SD15 on the data bus

2-6

AR-B1474 User¡¦s Guide

Name

Description

-MASTER [Input]

The MASTER is the signal from the I/O processor which

 

 

gains control as the master and should be held low for a

 

 

maximum of 15 microseconds or system memory may be

 

 

lost due to the lack of refresh

-MEMCS16

 

The Memory Chip Select 16 indicates that the present

[Input,

Open

data transfer is a 1-wait state, 16-bit data memory

collector]

 

operation

-IOCS16

 

The I/O Chip Select 16 indicates that the present data

[Input,

Open

transfer is a 1-wait state, 16-bit data I/O operation

collector]

 

 

OSC [Output]

 

The Oscillator is a 14.31818 MHz signal

ZWS

 

The Zero Wait State indicates to the microprocessor that

[Input,

Open

the present bus cycle can be completed without inserting

collector]

 

additional wait cycle

Table 2-6 ISA Bus Signal Description

2.4 SERIAL PORT

The ACEs (Asynchronous Communication Elements ACE1 to ACE2) are used to convert parallel data to a serial format on the transmit side and convert serial data to parallel on the receiver side. The serial format, in order of transmission and reception, is a start bit, followed by five to eight data bits, a parity bit (if programmed) and one, one and half (five-bit format only) or two stop bits. The ACEs are capable of handling divisors of 1 to 65535, and produce a 16x clock for driving the internal transmitter logic.

Provisions are also included to use this 16x clock to drive the receiver logic. Also included in the ACE a completed MODEM control capability, and a processor interrupt system that may be software tailored to the computing time required handle the communications link.

The following table is summary of each ACE accessible register

DLAB

Port Address

Register

0

base + 0

Receiver buffer (read)

 

 

Transmitter holding register (write)

0

base + 1

Interrupt enable

X

base + 2

Interrupt identification (read only)

X

base + 3

Line control

X

base + 4

MODEM control

X

base + 5

Line status

X

base + 6

MODEM status

X

base + 7

Scratched register

1

base + 0

Divisor latch (least significant byte)

1

base + 1

Divisor latch (most significant byte)

Table 2-7 ACE Accessible Registers

(1) Receiver Buffer Register (RBR)

Bit 0-7: Received data byte (Read Only)

(2) Transmitter Holding Register (THR)

Bit 0-7: Transmitter holding data byte (Write Only)

2-7

AR-B1474 User¡¦s Guide

(3) Interrupt Enable Register (IER)

Bit 0: Enable Received Data Available Interrupt (ERBFI) Bit 1: Enable Transmitter Holding Empty Interrupt (ETBEI) Bit 2: Enable Receiver Line Status Interrupt (ELSI)

Bit 3: Enable MODEM Status Interrupt (EDSSI) Bit 4: Must be 0

Bit 5: Must be 0 Bit 6: Must be 0 Bit 7: Must be 0

(4)Interrupt Identification Register (IIR)

Bit 0: “0” if Interrupt Pending Bit 1: Interrupt ID Bit 0

Bit 2: Interrupt ID Bit 1 Bit 3: Must be 0

Bit 4: Must be 0 Bit 5: Must be 0 Bit 6: Must be 0 Bit 7: Must be 0

(5)Line Control Register (LCR)

Bit 0: Word Length Select Bit 0 (WLS0)

Bit 1: Word Length Select Bit 1 (WLS1)

WLS1

WLS0

Word Length

0

0

5 Bits

0

1

6 Bits

1

0

7 Bits

1

1

8 Bits

Bit 2: Number of Stop Bit (STB)

Bit 3: Parity Enable (PEN)

Bit 4: Even Parity Select (EPS)

Bit 5: Stick Parity

Bit 6: Set Break

Bit 7: Divisor Latch Access Bit (DLAB)

(6)MODEM Control Register (MCR)

Bit 0: Data Terminal Ready (DTR) Bit 1: Request to Send (RTS)

Bit 2: Out 1 (OUT 1) Bit 3: Out 2 (OUT 2) Bit 4: Loop

Bit 5: Must be 0 Bit 6: Must be 0 Bit 7: Must be 0

(7)Line Status Register (LSR)

Bit 0: Data Ready (DR) Bit 1: Overrun Error (OR) Bit 2: Parity Error (PE) Bit 3: Framing Error (FE) Bit 4: Break Interrupt (BI)

Bit 5: Transmitter Holding Register Empty (THRE) Bit 6: Transmitter Shift Register Empty (TSRE) Bit 7: Must be 0

2-8

AR-B1474 User¡¦s Guide

(8)MODEM Status Register (MSR)

Bit 0: Delta Clear to Send (DCTS) Bit 1: Delta Data Set Ready (DDSR)

Bit 2: Training Edge Ring Indicator (TERI)

Bit 3: Delta Receive Line Signal Detect (DSLSD) Bit 4: Clear to Send (CTS)

Bit 5: Data Set Ready (DSR) Bit 6: Ring Indicator (RI)

Bit 7: Received Line Signal Detect (RSLD)

(9)Divisor Latch (LS, MS)

 

LS

MS

Bit 0:

Bit 0

Bit 8

Bit 1:

Bit 1

Bit 9

Bit 2:

Bit 2

Bit 10

Bit 3:

Bit 3

Bit 11

Bit 4:

Bit 4

Bit 12

Bit 5:

Bit 5

Bit 13

Bit 6:

Bit 6

Bit 14

Bit 7:

Bit 7

Bit 15

 

Desired Baud Rate

Divisor Used to Generate 16x Clock

 

300

384

 

600

192

 

1200

96

 

1800

64

 

2400

48

 

3600

32

 

4800

24

 

9600

12

 

14400

8

 

19200

6

 

28800

4

 

38400

3

 

57600

2

 

115200

1

Table 2-8 Serial Port Divisor Latch

2.5 PARALLEL PORT

(1) Register Address

Port Address

Read/Write

Register

base + 0

Write

Output data

base + 0

Read

Input data

base + 1

Read

Printer status buffer

base + 2

Write

Printer control latch

Table 2-9 Registers’ Address

(2) Printer Interface Logic

The parallel portion of the SMC37C669 makes the attachment of various devices that accept eight bits of parallel data at standard TTL level.

2-9

AR-B1474 User¡¦s Guide

(3) Data Swapper

The system microprocessor can read the contents of the printer’ s Data Latch through the Data Swapper by reading the Data Swapper address.

(4) Printer Status Buffer

The system microprocessor can read the printer status by reading the address of the Printer Status Buffer. The bit definitions are described as follows:

7

 

6

5

4

3

2

 

1

 

0

 

 

 

 

 

 

 

 

 

 

X

 

X

 

X

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-ERROR SLCT PE -ACK -BUSY

Figure 2-2 Printer Status Buffer

NOTE: X presents not used.

Bit 7: This signal may become active during data entry, when the printer is off-line during printing, or when the print head is changing position or in an error state. When Bit 7 is active, the printer is busy and can not accept data.

Bit 6: This bit represents the current state of the printer’ s ACK signal. A 0 means the printer has received the character and is ready to accept another. Normally, this signal will be active for approximately 5 microseconds before receiving a BUSY message stops.

Bit 5: A 1 means the printer has detected the end of the paper.

Bit 4: A 1 means the printer is selected.

Bit 3: A 0 means the printer has encountered an error condition.

(5) Printer Control Latch & Printer Control Swapper

The system microprocessor can read the contents of the printer control latch by reading the address of printer control swapper. Bit definitions are as follows:

7

 

6

5

4

3

2

 

1

 

0

 

 

X

 

X

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

STROBE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AUTO FD XT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

INIT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SLDC IN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IRQ ENABLE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DIR(write only)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 2-3 Bit’ s Definition

NOTE: X presents not used.

Bit 5: Direction control bit. When logic 1, the output buffers in the parallel port are disabled allowing data driven from external sources to be read; when logic 0, they work as a printer port. This bit is write only.

Bit 4: A 1 in this position allows an interrupt to occur when ACK changes from low state to high state.

Bit 3: A 1 in this bit position selects the printer.

Bit 2: A 0 starts the printer (50 microseconds pulse, minimum).

Bit 1: A 1 causes the printer to line-feed after a line is printed.

Bit 0: A 0.5 microsecond minimum highly active pulse clocks data into the printer. Valid data must be present for a minimum of 0.5 microseconds before and after the strobe pulse.

2-10

Sony DX4, AR-B1474, 486DX User Manual

AR-B1474 User¡¦s Guide

3. SETTING UP THE SYSTEM

This section describes pin assignments for system’ s external connectors and the jumpers setting.

Overview

System Setting

3.1OVERVIEW

The AR-B1474 is a half size industrial grade CPU card that has been designed to withstand continuous operation in harsh environments. The total on-board memory for the AR-B1474 can be configured from 1MB to 32MB by using all 72-pin type DRAM devices.

J1 J2

1

CN1

 

CN2

 

 

 

CN3

J3 J4

H4

 

 

 

 

 

 

H5

JP14

JP15

LED1

 

 

 

 

LED2

JP1

 

 

SW1

 

JP2

 

H6

 

 

H7

J5

 

 

 

 

 

 

 

 

 

JP4

 

JP3

 

 

 

 

 

 

 

 

 

 

 

P5

 

U8

 

 

 

 

 

 

 

 

 

 

 

U7

P6

 

 

 

 

 

 

 

 

 

 

SIMM1

U13

 

 

JP5

 

 

DB1

 

 

P7

 

 

 

 

 

 

 

U12

 

 

 

 

 

P8

 

 

 

 

 

 

 

 

 

 

 

 

 

JP6

 

 

 

 

 

 

 

JP7

 

 

 

JP8

 

U17

 

P9

 

U18

J6

 

 

JP9

 

 

 

 

 

 

 

P10

 

 

 

 

 

JP10

 

 

 

 

 

 

 

 

 

 

 

U20

J7

U26

 

 

 

U27

DB2

 

 

 

 

 

 

 

 

CN6

 

JP11

 

 

 

 

H14

CN4

H15

J8

JP12

CN6

 

JP13

 

 

 

 

BUS1

 

BUS2

CN5

 

 

H16

 

 

 

 

H18

 

 

 

H19

Figure 3-1 AR-B1474 Placement

3-1

AR-B1474 User¡¦s Guide

3.2 SYSTEM SETTING

Jumper pins allow you to set specific system parameters. Set them by changing the pin location of jumper blocks. (A jumper block is a small plastic-encased conductor that slips over the pins.) To change a jumper setting, remove the jumper from its current location with your fingers or small needle-nosed pliers. Place the jumper over the two pins designated for the desired setting. Press the jumper evenly onto the pins. Be careful not to bend the pins.

We will show the locations of the AR-B1474 jumper pins, and the factory-default setting.

CAUTION: Do not touch any electronic component unless you are safely grounded. Wear a grounded wrist strap or touch an exposed metal part of the system unit chassis. The static discharges from your fingers can permanently damage electronic components.

3.2.1 Serial Port

(1) RS-485 Adapter Select (JP3 & JP11)

JP3 and JP11 can be set independently. JP3 selects COM-A port and JP11 selects COM-B port.

JP3 -- COM-A

1

1

2

2

3

3

Reserved for Acrosser's

RS-232C

RS-485 adapter used only

(Factory Preset)

Figure 3-2 JP3: RS-485 Adapter Select for COM-A

JP11 -- COM-B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

2

3

 

1

2

3

 

 

Reserved for Acrosser's

 

RS-232C

RS-485 adapter used only

(Factory Preset)

Figure 3-3 JP11: RS-485 Adapter Select —COM-B

(2) RS-232 Connector (DB1 & DB2)

There are two serial ports with EIA RS-232C interface on the AR-B1474. COM-A and COM-B use two on-board D- type 9-pin male connectors (DB1 & DB2). If you want to configure the serial port, please refer to the BIOS configuration.

DB1 (COM A)

DB2 (COM B)

GND 5

GND 5

9-RI

9-RI

-DTR 4

-DTR 4

8-CTS

8-CTS

TXD 3

TXD 3

7-RTS

7-RTS

RXD 2

RXD 2

6-DSR

6-DSR

-DCD 1

-DCD 1

Figure 3-4 DB1 & DB2: RS-232 Connector

3-2

AR-B1474 User¡¦s Guide

3.2.2 Hard Disk (IDE) Connector (CN1)

A 40-pin header type connector (CN1) is provided to interface with up to two embedded hard disk drives (IDE AT bus). This interface, through a 40-pin cable, allows the user to connect up to two drives in a “daisy chain” fashion. To enable or disable the hard disk controller, please use BIOS Setup program to select. The following table illustrates the pin assignments of the hard disk drive’ s 40-pin connector.

2

 

 

40

1

 

 

39

 

Figure 3-5 CN1: Hard Disk (IDE) connector

Pin

Signal

Pin

Signal

1

-RESET

2

GROUND

3

DATA 7

4

DATA 8

5

DATA 6

6

DATA 9

7

DATA 5

8

DATA 10

9

DATA 4

10

DATA 11

11

DATA 3

12

DATA 12

13

DATA 2

14

DATA 13

15

DATA 1

16

DATA 14

17

DATA 0

18

DATA 15

19

GROUND

20

Not used

21

Not Used

22

GROUND

23

-IOW

24

GROUND

25

-IOR

26

GROUND

27

Not Used

28

BALE

29

Not Used

30

GROUND

31

IRQ14

32

-IOCS16

33

SA 1

34

Not used

35

SA 0

36

SA 2

37

-CS 0

38

-CS 1

39

HD LED A

40

GROUND

Table 3-1 HDD Pin Assignment

3.2.3 Power Connector (J5)

J5 is 8-pin power connector. Using the J5, you can connect the power supply to the on board power connector for stand alone applications directly.

J5

1 GND

2 +5VDC

3 +5VDC

4 GND

5 GND

6 +12VDC

7 -12VDC

8 -5VDC

Figure 3-6 J5: Power Connector

3-3

AR-B1474 User¡¦s Guide

3.2.4 FDD Port Connector (CN2)

The AR-B1474 provides a 34-pin header type connector for supporting up to two floppy disk drives.

To enable or disable the floppy disk controller, please use BIOS Setup program to select.

 

2

 

34

 

1

 

33

 

Figure 3-7 CN2: FDD Port connector

Pin

Signal

Pin

Signal

1-33(odd)

GROUND

18

-DIRECTION

2

-Reduce Write Current

20

-STEP OUTPUT PULSE

4

Not used

22

-WRITE DATA

6

Not used

24

-WRITE ENABLE

8

-INDEX

26

-TRACK 0

10

-MOTOR ENABLE A

28

-WRITE PROTECT

12

-DRIVE SELECT B

30

-READ DATA

14

-DRIVE SELECT A

32

-SIDE 1 SELECT

16

-MOTOR ENABLE B

34

-DISK CHANGE

Table 3-2 FDD Pin Assignment

3.2.5 Parallel Port Connector (CN3)

To use the parallel port, an adapter cable has been connected to the CN3 (26-pin header type) connector. This adapter cable is included in your AR-B1474 package. The connector for the parallel port is a 25-pin D-type female connector.

 

 

2

 

 

26

 

 

1

 

 

25

 

 

Parallel Port Connector

 

 

 

14

 

25

 

 

 

1

 

 

13

 

 

D-Type Connector

 

 

Figure 3-8 CN3: Parallel Port Connector

CN3

DB-25

Signal

CN3

DB-25

Signal

1

1

-Strobe

2

14

-Auto Form Feed

3

2

Data 0

4

15

-Error

5

3

Data 1

6

16

-Initialize

7

4

Data 2

8

17

-Printer Select In

9

5

Data 3

10

18

Ground

11

6

Data 4

12

19

Ground

13

7

Data 5

14

20

Ground

15

8

Data 6

16

21

Ground

17

9

Data 7

18

22

Ground

19

10

-Acknowledge

20

23

Ground

21

11

Busy

22

24

Ground

23

12

Paper Empty

24

25

Ground

25

13

Printer Select

26

--

No Connect

Table 3-3 Parallel Port Pin Assignments

3-4

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