HP 37722A telecom analyzer HP 37732A telecom/datacom analyzer
Technical specifications
Introduction
HP 37722/32A telecom/datacom analyzer
Contents |
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Introduction ............................................ |
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Specifications for telecom testing |
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using the HP 37722A telecom analyzer |
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or the HP 37732A telecom/datacom |
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analyzer ................................................... |
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Datacom testing using the |
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HP 37732A telecom/datacom analyzer .... |
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Specifications common to the |
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HP 37722A and 37732A analyzers .......... |
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Specifications of options available |
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for both analyzers .................................... |
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The HP 37722A telecom analyzer is an easy-to-use, lightweight fieldportable test set for in-service and out-of-service bit error and signal measurement on CEPT digital circuits and services. The HP 37722A analyzer provides framed/unframed pattern generation and measurements at and 2 Mb/s. Also, it offers many other features to help increase productivity and network uptime:
●n × 64 kb/s testing
●timeslot monitor including all signaling bits display ● timeslot access
● event-based storage in text and graphic form.
Options provide framed/unframed 8 Mb/s, framed/unframed 704 kb/s, 64 kb/s timeslot access and sub-rate processing (X.50 divisions 2 and 3, and X.58).
The HP 37722A telecom analyzer is easily upgraded to the
HP 37732A telecom/datacom analyzer, which combines the full telecom testing capability of the HP 37722A analyzer with datacom testing. The HP 37732A analyzer consists of the HP 37722A analyzer and the HP 15901A Option 001 datacom module.
The HP 37732A telecom/datacom analyzer provides testing at V.24, V.35, V.11/X.21-leased interfaces at rates up to 2 Mb/s. It also provides a full range of BER measurements:
●control-circuit timing analysis with transitions diagrams on the screen
●built-in V.24 breakout box
●internal synthesizer
●event-based storage in text and graphic form.
The HP 37732A analyzer reduces test time and speeds problem resolution by simplifying test setup. It presents results in easy-to-read and easy-to- record ways that make it easy to pinpoint the cause of a problem.
The HP E4540A distributed network analyzer (DNA) software, for a PC or laptop operating with Microsoft Windows®, can be used to remotely control the HP 37722A telecom analyzer or HP 37732A telecom/datacom analyzer over modem links from a local support center.
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Specifications for telecom testing using the
HP 37722A telecom analyzer or the
HP 37732A telecom/datacom analyzer
Telecom specifications |
Transmitter |
Receiver |
Bit rates: 2.048 Mb/s, 64 kb/s; optional 8.448 Mb/s, 704 kb/s, sub64 kb/s.
Frame structure: 2 Mb/s unframed, to ITU-T G.704, G.706, G.732, G.704: with no multiframe; with CAS multi-frame with/ without CRC4 multiframe;
64 kb/s codirectional; independent setting for transmitter and receiver.
Interfaces: To ITU-T G.703 and G.823.
Connectors
BNC: 75 ohm, unbalanced.
3-pin Siemens: 120 ohm, balanced.
Modes of operation
Transmit, receive, through mode.
Auto setup
Bit rate, line code, framing and pattern.
Test patterns
PRBS: 211 − 1 (ITU-T O.153), 215 − 1, 223 − 1 (ITU-T O.151) (inverted or non-inverted).
Word: Fully programmable n-bit word (n=8 to 1024); all ones, 1 in 2 (1010).
Timeslot selection: All timeslots, single timeslot, n timeslots for n = 1 to 31 (contiguous or non-contiguous). Receive timeslot as for transmitter, or independently set.
Deselected timeslots: 26 − 1 PRBS or all ones (transmit only).
Test period: Manual, single: 15 min, 30 min, 1 hour, 24 hour, user defined:
1 to 100 seconds, minutes, hours, days.
Timing: Recovered (loop timed), internal, external.
Internal clock: 2.048 MHz, 64 kHz, (± 10 ppm).
2 Mb/s transmitter
Output
Ternary: HDB3 or AMI. Binary: TTL, data NRZ, clock normal or inverted, .
Error insertion
Bit, code: Single, variable 10− 2 to 10− 8.
Frame error add
FAS word, NFAS bit, CAS MFAS word (CAS multiframe mode); CRC MFAS word and CRC bits (CRC4 multiframe mode). Mode: Burst, continuous.
Alarm generation: AIS 2 or 3 zeros in 512; AIS all ones, remote alarm, remote mutiframe alarm, no signal.
Signaling bits: Set ABCD signaling bits in CAS multiframe to any 4-bit pattern (all channels contain the same pattern).
Overhead bits: Individual setting of Si, spare MFAS, NFAS bits 4 to 8 (Sa) for all odd-numbered frames.
64 kb/s transmitter
Codirectional data output Octet timing (to ITU-T G.703):
On, off.
Bit error add: Single, variable 10− 2 to 10− 8.
2 Mb/s receiver
Timeslot monitor: Displays contents of single data timeslot, FAS timeslot, NFAS timeslot (bits 1 to 8 for all odd-numbered frames), MFAS, single signaling channel or all signaling channels.
Input
Binary/ternary: 2.048 Mb/s
± 100 ppm (nominal).
Terminate: 0 to 30 dB.
Binary: TTL, data NRZ, clock normal or inverted.
64 kb/s receiver
Codirectional data input:
64 kb/s ± 150 ppm (nominal).
Terminate: 0 to 30 dB.
HP 37722A telecom analyzer
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