Emerson PME1, PMT1 User Manual

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Emerson PME1, PMT1 User Manual

User’s Manual from Emerson Network Power

Embedded Computing

PmT1 and PmE1: High Speed T1 and E1 Interface Module December 2007

The information in this manual has been checked and is believed to be accurate and reliable. HOWEVER, NO RESPONSIBILITY IS ASSUMED BY EMERSON NETWORK POWER, EMBEDDED COMPUTING FOR ITS USE OR FOR ANY INACCURACIES. Specifications are subject to change without notice. EMERSON DOES NOT ASSUME ANY LIABILITY ARISING OUT OF USE OR OTHER APPLICATION OF ANY PRODUCT, CIRCUIT, OR PROGRAM DESCRIBED HEREIN. This document does not convey any license under Emerson patents or the rights of others.

Emerson. Consider It Solved is a trademark, and Business-Critical Continuity, Emerson Network Power, and the Emerson Network Power logo are trademarks and service marks of Emerson Network Power, Embedded Computing, Inc.

© 2007 Emerson Network Power, Embedded Computing, Inc.

Revision Level:

Principal Changes:

Date:

10002367-00

Original release

March 2001

 

 

 

10002367-01

RoHS 5-of6 compliance, ECR000272

March 2006

 

 

 

10002367-02

Artwork rev.-33

December 2007

 

 

 

Copyright © 2007 Emerson Network Power, Embedded Computing, Inc. All rights reserved.

Regulatory Agency Warnings & Notices

The Emerson PmT1 and PmE1 meets the requirements set forth by the Federal Communications Commission (FCC) in Title 47 of the Code of Federal Regulations. The following information is provided as required by this agency.

This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.

Caution:

!

FCC RULES AND REGULATIONS — PART 15

This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case the user will be required to correct the interference at his own expense.

Making changes or modifications to the PmT1 and PmE1 hardware without the explicit consent of Emerson Network Power could invalidate the user’s authority to operate this equipment.

Caution:

!

EMC COMPLIANCE

The electromagnetic compatibility (EMC) tests used a PmT1 and PmE1 model that includes a front panel assembly from Emerson Network Power.

For applications where the PmT1 and PmE1 is provided without a front panel, or where the front panel has been removed, your system chassis/enclosure must provide the required electromagnetic interference (EMI) shielding to maintain EMC compliance.

FCC RULES AND REGULATIONS — PART 68

This equipment complies with Part 68 of the FCC rules. There is a label on the PmT1 and PmE1 board that contains the FCC registration number. If requested, this information must be provided to the telephone company.

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Regulatory Agency Warnings & Notices(continued)

This board is designed to be connected to the telephone network or premises wiring using a compatible modular jack which is Part 68 compliant. This board cannot be used on telephone company-provided coin service. Connection to Party Line Service is subject to state tariffs.

If this board causes harm to the telephone network, the telephone company will notify you in advance that temporary discontinuance of service may be required. If advance notice is not practical, the telephone company will notify the customer as soon as possible. Also, you will be advised of your right to file a complaint with the FCC if you believe it is necessary.

The telephone company may make changes in its facilities, equipment, operations, or procedures that could affect the operation of the equipment. If this happens, the telephone company will provide advance notice in order for you to make the necessary modifications in order to maintain uninterrupted service.

It is recommended that the customer install an AC surge arrestor in the AC outlet to which this device is connected. This is to avoid damaging the equipment caused by local lightening strikes and other electrical surges.

The following table lists each applicable Facility Interface Code (FIC) along with the Service

Order Code (SOC) and connector jack type for the PmT1 and PmE1.

 

Facility Interface

FIC

Service Order

Jack

Board Name:

Code (FIC):

Description:

Code (SOC):

Type:

PmT1 and PmE1

04DU9.BN

1.54 Mbps AMI Superframe Format (SF) without

6.0Na

RJ48C

 

 

line power

 

 

 

04DU9.DN

1.544 Mbps SF and B8ZF without line power

 

 

 

04DU9.1KN

1.544 Mbps AMI ESF without line power

 

 

 

04DU9.1SN

1.544 Mbps AMI ESF and B8ZS without line power

 

 

 

 

 

 

 

a.Combinations of equipment provide full protection to digital service. Billing protection and encoded analog protection are provided either by including auxiliary equipment within the registration envelope or by use of a separately registered device.

Note: The following information and instructions must be given to the final assembler/end user.

The mounting of the PmT1 and PmE1 in the final assembly must be made so that the PmT1 and PmE1 is isolated from exposure to hazardous voltages within the assembly. Adequate separation and restraint of cables and cords must be provided.

The circuitry from the PmT1 and PmE1 to the telephone line must be provided in wiring that carries no other circuitry that is specifically allowed in the rules, such as PR and PC leads.

PC board traces carrying tip and ring leads shall have sufficient spacing to avoid surge breakdown.

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Regulatory Agency Warnings & Notices(continued)

Information shall be provided as to the power source requirements. See the PmT1 and PmE1 power requirements in the hardware manual.

If the device is enclosed in an assembly, and not readily accessible, a label shall be placed on the exterior of the cabinet listing the registration number of each PmT1 and PmE1 contained therein.

The final assembler shall provide, in the consumer instructions, all applicable Network Connection Information.

Caution:

!

INDUSTRY CANADA RULES AND REGULATIONS — CS03

NOTICE: The Industry Canada label identifies certified equipment. This certification means that the equipment meets certain telecommunications network protective, operational, and safety requirements as prescribed in the appropriate Terminal Equipment Technical Requirements document(s). The Department does not guarantee the equipment will operate to the user’s satisfaction.

Before installing this equipment, users should ensure that it is permissible to be connected to the facilities of the local telecommunications company. The equipment must also be installed using an acceptable method of connection. The customer should be aware that compliance with the above conditions may not prevent degradation of service in some situations.

Repairs to certified equipment should be coordinated by a representative designated by the supplier. Any repairs or alterations made by the user to this equipment, or equipment malfunctions, may give the telecommunications company cause to request the user to disconnect the equipment.

Users should ensure for their own protection that the electrical ground connections of the power utility, telephone lines, and internal metallic water pipe system, if present, are connected together. This precaution may be particularly important in rural areas.

Users should not attempt to make such connections themselves, but should contact the appropriate electric inspection authority, or electrician as appropriate.

The standard connecting arrangement code (telephone jack type) for this equipment is CA48C.

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Regulatory Agency Warnings & Notices(continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EC Declaration of Conformity

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

According to EN 45014:1998

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Manufacturer’s Name:

 

 

 

Emerson Network Power

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Embedded Computing

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Manufacturer’s Address:

 

 

 

8310 Excelsior Drive

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Madison, Wisconsin 53717

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Declares that the following product, in accordance with the requirements of 2004/108/EEC, EMC

Directive and 1999/5/EC, RTTE Directive and their amending directives,

Product:

PMC Module

Model Name/Number:

PmT1 and PmE1/01439143-xx

has been designed and manufactured to the following specifications:

EN55022:1998 Information Technology Equipment, Radio disturbance characteristics, Limits and methods of measurement

EN55024:1998 Information Technology Equipment, Immunity characteristics, Limits and methods of measurement

EN300386 V.1.3.1 Electromagnetic compatibility and radio spectrum matters (ERM);

Telecommunication network equipment; EMC requirements

As manufacturer we hereby declare that the product named above has been designed to comply with the relevant sections of the above referenced specifications. This product complies with the essential health and safety requirements of the EMC Directive and RTTE Directive. We have an internal production control system that ensures compliance between the manufactured products and the technical documentation.

Bill Fleury

Compliance Engineer

Issue date: December 14, 2007

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Contents

1 Overview

Components and Features . . . . . . . . . . . 1-1

Functional Overview . . . . . . . . . . . . . . . . 1-1

Physical Memory Map . . . . . . . . . . . . . . . 1-2

Additional Information . . . . . . . . . . . . . . 1-4

Product Certification . . . . . . . . . . . . . 1-4

RoHS Compliance. . . . . . . . . . . . . . . . 1-6

Terminology and Notation. . . . . . . . 1-6

Technical References. . . . . . . . . . . . . 1-6

2 Setup

Electrostatic Discharge . . . . . . . . . . . . . . 2-1

PmT1 and PmE1 Circuit Board . . . . . . . . 2-1

Connectors . . . . . . . . . . . . . . . . . . . . . 2-4

Installation . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

PmT1 and PmE1 Setup . . . . . . . . . . . . . . 2-5

Power Requirements. . . . . . . . . . . . . 2-5

Environmental Considerations . . . . 2-6

Reset Methods . . . . . . . . . . . . . . . . . . . . . 2-6

Troubleshooting . . . . . . . . . . . . . . . . . . . . 2-6

Technical Support . . . . . . . . . . . . . . . 2-7

Product Repair . . . . . . . . . . . . . . . . . . 2-8

3 Central Processing Unit

MPC860P Initialization . . . . . . . . . . . . . . 3-1 MPC860P Exception Handling . . . . . . . . 3-3 CPU Interrupts . . . . . . . . . . . . . . . . . . 3-4

System Interface Unit (SIU). . . . . . . . . . . 3-4 Timebase Counter . . . . . . . . . . . . . . . 3-5 Decrementer Counter. . . . . . . . . . . . 3-5 Software Reset . . . . . . . . . . . . . . . . . . . . . 3-5 MPC860 Parallel Port configuration . . . 3-5 Optional BDM Header . . . . . . . . . . . . . . . 3-6

4 On-Card Memory

Configuration

Socketed Flash . . . . . . . . . . . . . . . . . . . . . 4-1

I2C EEPROM. . . . . . . . . . . . . . . . . . . . . . . . 4-1

I2C EEPROM Operation . . . . . . . . . . . 4-2

Emerson Memory Map . . . . . . . . . . . 4-2

On-card DRAM . . . . . . . . . . . . . . . . . . . . . 4-2

On-card Memory Sizing and Type . . 4-3

DRAM Timing . . . . . . . . . . . . . . . . . . . 4-3

5 Serial I/O

The Communications Processor Module5-1

CPM Register Initialization Format . 5-2

RISC Controller. . . . . . . . . . . . . . . . . . 5-2

CPM Interrupt Handling . . . . . . . . . . 5-3

Dual-Port RAM . . . . . . . . . . . . . . . . . . 5-3

General Purpose Timers . . . . . . . . . . 5-4

Independent DMA (IDMA) Channels5-4

Serial DMA (SDMA) Channels . . . . . 5-4

MPC860P Serial Interface . . . . . . . . . . . . .

5-4

Serial Communication Controllers

 

(SCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5-5

Serial Management Controllers

(SMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5 Time Slot Assigner (TSA) . . . . . . . . . 5-5 UART Baud Rate Selection . . . . . . . . . . . .5-6 Serial Connector Pin Assignments . . . . .5-7

6 TDM Interface

The T1 or E1 Line Interface . . . . . . . . . . . .6-4

Configuring the T1 or E1 Interface . . . . .6-5

The T1 FDL Interface . . . . . . . . . . . . . . . . .6-5

The Management Data Interface (MDI) .6-7

Front Panel I/O . . . . . . . . . . . . . . . . . . . . . .6-8

7 PMC/PCI Interface

PCI9060ES Register Map. . . . . . . . . . . . . .7-1 PCI Configuration Registers. . . . . . . 7-1

Local Configuration Registers . . . . . 7-2 Shared Runtime Registers . . . . . . . . 7-3

PCI9060ES Initialization . . . . . . . . . . . . . .7-3 Deadlocked Cycles . . . . . . . . . . . . . . 7-6

Retries on Local Direct Master Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-6

Retries on Direct Slave Cycles. .7-6 Assigning Priorities. . . . . . . . . . .7-6 Controlling Access Latency . . . . . . . 7-7

Avoiding the PCI9060ES Phantom Read. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-7

Managing Bandwidth . . . . . . . . . . . . 7-8 Bridge to Bridge Considerations . . . 7-8 PCI Interrupts . . . . . . . . . . . . . . . . . . . . . . .7-8 PCI Bus Interface . . . . . . . . . . . . . . . . 7-8 PMC Connector Pin Assignments . . . . . .7-8 PCI Bus Control Signals . . . . . . . . . . 7-10

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8 Monitor

Power-up/Reset Sequence . . . . . . . . . . . .8-1 Start-up Display . . . . . . . . . . . . . . . . . . . . .8-4 Command-line History . . . . . . . . . . . . . . .8-5 Command-line Editor . . . . . . . . . . . . . . . .8-5 Initializing Memory . . . . . . . . . . . . . . . . . .8-6 Command Syntax . . . . . . . . . . . . . . . . . . . .8-6 Initializing Memory . . . . . . . . . . . . . . . . . .8-7 Command Syntax . . . . . . . . . . . . . . . . . . . .8-7

Typographic Conventions . . . . . . . . 8-7 Boot Commands. . . . . . . . . . . . . . . . . . . . .8-7 bootbus . . . . . . . . . . . . . . . . . . . . . . . . 8-7 booteprom . . . . . . . . . . . . . . . . . . . . . 8-8 bootrom. . . . . . . . . . . . . . . . . . . . . . . . 8-9 bootserial. . . . . . . . . . . . . . . . . . . . . . . 8-9

Help Commands. . . . . . . . . . . . . . . . . . . 8-10 help. . . . . . . . . . . . . . . . . . . . . . . . . . .8-10

Memory/Register Commands . . . . . . . 8-10 checksummem. . . . . . . . . . . . . . . . .8-10 clearmem . . . . . . . . . . . . . . . . . . . . .8-10 cmpmem . . . . . . . . . . . . . . . . . . . . . .8-10 copymem . . . . . . . . . . . . . . . . . . . . .8-10 displaymem . . . . . . . . . . . . . . . . . . .8-11 fillmem. . . . . . . . . . . . . . . . . . . . . . . .8-11 findmem . . . . . . . . . . . . . . . . . . . . . .8-11 findnotmem . . . . . . . . . . . . . . . . . . .8-11 findstr. . . . . . . . . . . . . . . . . . . . . . . . .8-11 readmem . . . . . . . . . . . . . . . . . . . . . .8-11 setmem . . . . . . . . . . . . . . . . . . . . . . .8-12 swapmem . . . . . . . . . . . . . . . . . . . . .8-12 testmem . . . . . . . . . . . . . . . . . . . . . .8-12 um. . . . . . . . . . . . . . . . . . . . . . . . . . . .8-12 writemem . . . . . . . . . . . . . . . . . . . . .8-12 writestr. . . . . . . . . . . . . . . . . . . . . . . .8-13

NVRAM Commands . . . . . . . . . . . . . . . . 8-13 nvdisplay . . . . . . . . . . . . . . . . . . . . . .8-13

nvinit . . . . . . . . . . . . . . . . . . . . . . . . .8-14 nvopen. . . . . . . . . . . . . . . . . . . . . . . .8-14 nvset. . . . . . . . . . . . . . . . . . . . . . . . . .8-14 nvupdate . . . . . . . . . . . . . . . . . . . . . .8-15

Configuring the Default Boot

Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-15 Power-up Diagnostic/Test Commands 8-17 cachetest . . . . . . . . . . . . . . . . . . . . . .8-18 eepromtest . . . . . . . . . . . . . . . . . . . .8-18 memtest . . . . . . . . . . . . . . . . . . . . . .8-18 Remote Host Commands . . . . . . . . . . . 8-18 call. . . . . . . . . . . . . . . . . . . . . . . . . . . .8-19

download . . . . . . . . . . . . . . . . . . . . . 8-19 Binary Download Format . . . . . . . . 8-19 transmode . . . . . . . . . . . . . . . . . . . . 8-20 Configuring the Download Port . . 8-20 Hex-Intel Format . . . . . . . . . . . . . . . 8-21 Extended Address Record . . . . . . . 8-21 Data Record . . . . . . . . . . . . . . . . . . . 8-22 End-of-file Record . . . . . . . . . . . . . . 8-22 Motorola S-record Format . . . . . . . 8-24 S0-records (User Defined) . . . . . . . 8-24

S1-S2-and S3-records

(Data Records) . . . . . . . . . . . . . . . . . . . . . . . . . 8-25 S5-records (Data Count Records) . 8-25

S7-S8-and S9-records (Termination and Start Address Records) . . . . . . . . . . . . . . . . . . 8-26

Utilities . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-27 configboard . . . . . . . . . . . . . . . . . . . 8-27

Arithmetic Commands . . . . . . . . . . . . . 8-27 add . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-27

div. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-27 mul . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-28 rand . . . . . . . . . . . . . . . . . . . . . . . . . . 8-28 sub . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-28

Errors and Screen Messages . . . . . . . . . 8-28 Monitor Function Reference . . . . . . . . 8-29 PmT1 and PmE1-Specific Functions . . 8-30 ChangeBaud . . . . . . . . . . . . . . . . . . . 8-30 EEPROMAcc . . . . . . . . . . . . . . . . . . . 8-30 getchar . . . . . . . . . . . . . . . . . . . . . . . 8-30 InitBoard . . . . . . . . . . . . . . . . . . . . . . 8-31 Misc . . . . . . . . . . . . . . . . . . . . . . . . . . 8-31 NvHkOffset . . . . . . . . . . . . . . . . . . . . 8-32 NvRamAcc . . . . . . . . . . . . . . . . . . . . 8-32 SetUnExpIntFunct . . . . . . . . . . . . . . 8-33

MPC860P-Specific Functions . . . . . . . . 8-33 Cache . . . . . . . . . . . . . . . . . . . . . . . . . 8-33

Exceptions. . . . . . . . . . . . . . . . . . . . . 8-33 Interrupts . . . . . . . . . . . . . . . . . . . . . 8-35 Status. . . . . . . . . . . . . . . . . . . . . . . . . 8-36 Standard Monitor Functions. . . . . . . . . 8-36 atoh . . . . . . . . . . . . . . . . . . . . . . . . . . 8-36 BootUp . . . . . . . . . . . . . . . . . . . . . . . 8-37 InitFifo . . . . . . . . . . . . . . . . . . . . . . . . 8-38 IsLegal . . . . . . . . . . . . . . . . . . . . . . . . 8-38 MemMng. . . . . . . . . . . . . . . . . . . . . . 8-39 NVSupport . . . . . . . . . . . . . . . . . . . . 8-40 Seed . . . . . . . . . . . . . . . . . . . . . . . . . . 8-42 Serial . . . . . . . . . . . . . . . . . . . . . . . . . 8-42

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Contents(continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

. . . . . . . . . . . . . . . . . . . . .TestSuite

.8-44

 

 

 

9 Acronyms

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

xprintf. . . . . . . . . . . . . . . . . . . . . . . .

.8-45

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Contents(continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Figures

Figure 1-1: General System Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Figure 1-2: Physical Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 Figure 2-1: PmT1 and PmE1 Front Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Figure 2-2: Component Map, Top (rev. 33) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Figure 2-3: Component Map, Bottom (rev. 33) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 Figure 2-4: PmT1 and PmE1 Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 Figure 2-5: Serial Number and Product ID on Bottom Side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 Figure 3-1: Processor BDM Header. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 Figure 6-1: TDM and FDL Connectivity Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3 Figure 6-2: MDI Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7 Figure 6-3: Front Panel I/O Connectors, P1 and P2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8 Figure 6-4: Front Panel I/O Cable Assembly (C308A009-05). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9 Figure 7-1: PMC Interface Connectors (P11, P12, P14). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9 Figure 8-1: Monitor Start-up Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-4

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Tables

Table 1-1: Address Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 Table 1-2: MTBF Hours . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 Table 1-3: Regulatory Agency Compliance — T1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 Table 1-4: Regulatory Agency Compliance — E1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 Table 1-5: Technical References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 Table 2-1: Circuit Board Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Table 2-2: Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 Table 2-3: Environmental Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 Table 3-1: MPC860P Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Table 3-2: MPC860P Special Purpose Register Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Table 3-3: MPC860P Internal Register Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Table 3-4: MPC860P Exceptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 Table 3-5: MPC860P SIU Register Block Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4 Table 3-6: MPC860P Ports A and C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6 Table 3-7: Processor BDM Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 Table 4-1: I2C EEPROM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 Table 4-2: I2C EEPROM Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 Table 4-3: RAM Acess Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3 Table 5-1: MPC860P CPM Register Block Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1 Table 5-2: CPM Initialization Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 Table 5-3: RISC Controller Processing Priority. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 Table 5-4: Asynchronous Baud Rates (16X oversample). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6 Table 5-5: Synchronous Baud Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7 Table 5-6: P14, P0, P2 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7 Table 6-1: TDM to T1E1 Port Connections for TDMB (P1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 Table 6-2: T1E1 Signals from Transceiver, P1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 Table 6-3: TDM to T1E1 Port Connections for TDMA (P2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 Table 6-4: T1E1 Signals from Transceiver, P2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 Table 6-5: FDL QUICC Port Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6 Table 6-6: MDI Port Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7 Table 6-7: MDI Bit Field Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8 Table 6-8: Compu-Shield to RJ45 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9 Table 7-1: PCI Configuration Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1 Table 7-2: Local Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2 Table 7-3: Shared Runtime Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3 Table 7-4: PCI9060ES PCI Configuration Register Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4 Table 7-5: PCI9060ES Local Configuration Register Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5 Table 7-6: PCI9060ES Shared Runtime Register Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6 Table 7-7: PCI9060ES Bus Priority Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-7 Table 7-8: PCI-to-Local Slave Access Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-8

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Table 7-9: Connector P11 and P12 Pin Assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9 Table 8-1: NVRAM Configuration Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2 Table 8-2: Device Download Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9 Table 8-3: NVRAM Power-up Diagnostic PASS/FAIL Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-17 Table 8-4: PLX Mailbox 0 Sequence and Fail Mask Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-17 Table 8-5: Error and Screen Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-28 Table 8-6: Assigned Exception Vectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-34 Table 8-7: IsLegal Function Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-39 Table 8-8: NVOp Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-41 Table 8-9: NVOP Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-42

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Registers

Register 4-1: Board Configuration 0 (BCR), 0x010 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3

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Section 1

Overview

The PmT1 and PmE1 is a single width PMC module designed to provide high-speed T1 and E1 interfaces for PMC-compatible baseboards. The design is based on the Freescale™ MPC860P PowerQUICC™ microprocessor and the PLX Technology PCI9060ES bus interface controller. The PmT1 has two standard landed T1 channels, and the PmE1 has two standard landed E1 channels. An optional EIA-422 port is available.

COMPONENTS AND FEATURES

The following is a brief summary of the PmT1 and PmE1 hardware components and features:

CPU: The CPU for the PmT1 and PmE1 is the Freescale MPC860P PowerQUICC 32-bit microprocessor chip running at 80MHz. See Chapter 3 for processor features.

RAM: The PmT1 and PmE1 module is populated with 16 megabytes of 32-bit wide DRAM.

Flash: The PmT1 and PmE1 module has a 32-pin PLCC flash socket with a 512-kilobyte flash capacity.

Serial I/O: The PmT1 and PmE1 module has two EIA-232 I/O ports implemented with two serial management controllers (SMCs). If the second E1 channel is not required, the PmE1 can be factory configured to additionally provide a single EIA-422 serial port.

T1E1: The PmT1 is factory configured to support the T1 channel using the Dallas Semiconductor

DS2151Q controller. The PmE1 is factory configured to support the E1 channel using the

Dallas Semiconductor DS2153Q controller.

PCI Bus: The PLX Technology PCI9060ES controls the Peripheral Component Interconnect (PCI) bus.

The PmT1 and PmE1 modules appear as peripheral cards to PCI.

FUNCTIONAL OVERVIEW

The following block diagram provides a functional overview for the PmT1 and PmE1:

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Overview: Physical Memory Map

Figure 1-1: General System Block Diagram

 

 

 

 

 

CPU

 

PmT1 or PmE1

 

 

 

Channel 1

 

 

MPC860P

 

 

 

 

 

 

System Interface Unit (SIU)

 

 

PmT1 or PmE1

 

Memory Controller

 

 

 

 

 

Channel 2 or EIA422 Port

Internal

External

 

 

 

 

Bus Interface Bus Interface

 

 

 

 

Unit

Unit

32-Bit Bus

Power PC

 

 

System Functions

 

 

 

Processor Core

 

 

Real-Time Clock

 

 

Connectors P14

 

PCMCIA-ATA Interface

 

 

EIA232 Console

 

 

 

 

 

 

 

 

 

 

 

 

 

and Download

 

 

 

 

PMC

Serial Ports

 

Communcations

 

 

 

Processor Module (CPM)

 

 

 

I2C

 

 

 

 

 

 

 

A32/D32

 

 

 

EEPROM

 

 

 

 

 

2 kilobytes

A21/D32

A20/D8

 

 

 

 

 

ConnectorsPMC P12P11,

 

 

DRAM

Flash/ROM

PCI Controller

PCI

 

16 megabytes

Socket

32

 

 

PCI90x0

 

 

 

512 kilobytes

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

Serial

 

 

 

 

 

EEPROM

 

 

 

 

 

128 bytes

 

 

PHYSICAL MEMORY MAP

The physical memory map of the PmT1 and PmE1 is depicted in Fig. 1-2. Information on particular portions of the memory map can be found in later sections of this manual. See

Table 1-1 for a list of these references.

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Overview: Physical Memory Map

Figure 1-2: Physical Memory Map

Hex Address

FFFF,FFFF

 

Flash/ROM Socket

FFF0,0000

 

CPU Registers

 

FF00,0000

 

Reserved

 

C101,0000

 

PMC/PCI Interface Registers

C100,0000

 

Reserved

C000,0200

Board Configuration Register

C000,0180

 

Reserved

C000,0080

IDs / Interrupts

C000,0000

 

Reserved

 

8000,0000

 

PCI I/O Space

 

6000,0000

 

PCI Memory Space

 

4000,0000

 

Reserved

 

0100,0000

 

DRAM

 

0000,0000

 

 

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Overview: Additional Information

Table 1-1: Address Summary

Physical Address

Access

 

See

(hex):

Mode:

Description:

Page:

FFF0,0000

R

Flash/ROM Socket

4-1

 

 

 

 

FF00,0000

R/W

CPU registers

3-2

 

 

 

 

C101,0000

reserved

C100,0000

R/W

PMC/PCI Interface registers

7-2

 

 

 

 

C000,0200

reserved

C000,0180

R

Board Configuration register

4-3

 

 

 

 

C000,0080

reserved

C000,000C

R

Conventional Interrupt register

3-4

 

 

 

 

C000,0000

R

Interrupt Vector register

3-4

 

 

 

 

8000,0000

reserved

6000,0000

R/W

PCI I/O Space

7-2

 

 

 

 

4000,000

R/W

PCI Memory Space

7-2

 

 

 

 

C101,0000

reserved

0000,0000

R/W

DRAM

4-2

 

 

 

 

ADDITIONAL INFORMATION

This section lists the PmT1 and PmE1 hardware’s regulatory certifications and briefly discusses the terminology and notation conventions used in this manual. It also lists general technical references.

Mean time between failures (MTBF) is listed in the following table:

Table 1-2: MTBF Hours

Product

Calculation Method:

Hours:

PmT1

Bellcore Issue 5

344,234

 

 

 

PmE1

Telecordia Issue 1

1,333,573

 

 

 

Product Certification

The PmT1 and PmE1 hardware has been tested to comply with various safety, immunity, and emissions requirements as specified by the Federal Communications Commission (FCC), Underwriters Laboratories (UL), and others. The following table summarizes this compliance:

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Overview: Additional Information

Table 1-3: Regulatory Agency Compliance — T1

 

Type:

 

Specification:

 

Safety

 

UL60950-1, CSA C22.2 No. 60950-1-03, 1st Edition – Safety of

 

 

 

Information Technology Equipment, including Electrical Business

 

 

 

Equipment (BI-National)

 

 

 

Global IEC – CB Scheme Report IEC 60950, all country deviations

 

 

 

 

 

Telecom

 

FCC Part 68 – Title 47, Code of Federal Regulations, Radio

 

 

 

Frequency Devices

 

 

 

IC CS03 – Radiated and Conducted Emissions, Canada

 

 

 

 

 

EMC

 

FCC Part 15, Class A – Title 47, Code of Federal Regulations, Radio

 

 

 

Frequency Devices

 

 

 

ICES 003, Class A – Radiated and Conducted Emissions, Canada

 

 

 

 

Table 1-4: Regulatory Agency Compliance — E1

 

Type:

 

Specification:

 

 

 

Safety

 

IEC60950/EN60950 – Safety of Information Technology Equipment

 

 

 

(Western Europe)

 

 

 

 

 

Telecom

 

CTR012 – Business Telecommunications; Open Network Provision

 

 

 

technical requirements; 2048 kbits/s digital unstructured leased line

 

 

 

attachment requirements for terminal equipment.

 

 

 

CTR013 – Business Telecommunications Open Network Provision

 

 

 

technical requirement, 2048 kbits/s structured, leased line attachment

 

 

 

requirements for terminal equipment.

 

 

 

 

 

EMC

 

EN55022 – Information Technology Equipment, Radio Disturbance

 

 

 

Characteristics, Limits and Methods of Measurement

 

 

 

EN55024 – Information Technology Equipment, Immunity

 

 

 

Characteristics, Limits and Methods of Measurement

 

 

 

ETSI EN300386 – Electromagnetic Compatibility and Radio Spectrum

 

 

 

Matters (ERM), Telecommunication Network Equipment,

 

 

 

Electromagnetic Compatibility (EMC) Requirements

 

 

 

 

Emerson maintains test reports that provide specific information regarding the methods and equipment used in compliance testing. Unshielded external I/O cables, loose screws, or a poorly grounded chassis may adversely affect the PmT1 and PmE1 hardware’s ability to comply with any of the stated specifications.

The UL web site at ul.com has a list of Emerson’s UL certifications. To find the list, search in the online certifications directory using Emerson’s UL file number, E190079. There is a list for products distributed in the United States, as well as a list for products shipped to Canada. To find the PmT1 and PmE1, search in the list for 01439143-xx, where xx changes with each revision of the printed circuit board.

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Overview: Additional Information

RoHS Compliance

The PmT1 and PmE1 are compliant with the European Union’s RoHS (Restriction of Use of Hazardous Substances) directive created to limit harm to the environment and human health by restricting the use of harmful substances in electrical and electronic equipment. Effective July 1, 2006, RoHS restricts the use of six substances: cadmium (Cd), mercury (Hg), hexavalent chromium (Cr (VI)), polybrominated biphenyls (PBBs), polybrominated diphenyl ethers (PBDEs) and lead (Pb). Configurations that are 5-of-6 are built with tin-lead solder per the lead-in-solder RoHS exemption.

To obtain a certificate of conformity (CoC) for the PmT1 and PmE1 modules, send an e-mail to sales@artesyncp.com or call 1-800-356-9602. Have the part number(s) (e.g., C000####-##) for your configuration(s) available when contacting Emerson.

Terminology and Notation

Active low signals: An active low signal is indicated with an asterisk * after the signal name.

Byte, word: Throughout this manual byte refers to 8 bits, word refers to 16 bits, and long word refers to 32 bits, double long word refers to 64 bits.

PLD: This manual uses the acronym, PLD, as a generic term for programmable logic device (also known as FPGA, CPLD, EPLD, etc.).

Radix 2 and 16: Hexadecimal numbers end with a subscript 16. Binary numbers are shown with a subscript 2.

Technical References

Further information on basic operation and programming of the PmT1 and PmE1 components can be found in the following documents:

Table 1-5: Technical References

Device / Interface:

 

Document: 1

 

Controller, T1/E1

 

DS2153Q, E1 Single Chip Transceiver Data Sheet

 

 

(Dallas Semiconductor, REV: 01106)

 

 

DS2151Q, T1 Single Chip Transceiver Data Sheet

 

 

(Dallas Semiconductor, REV: 011706)

 

 

Application Note 342; DS2151, DS2153 Initialization and Programming

 

 

(Dallas Semiconductor, 102899)

 

 

http://www.maxim-ic.com/

 

 

 

CPU

 

MPC860P PowerQUICC™ Technical Summary

 

 

(Freescale Semiconductor, 07/2004 Rev. 3)

 

 

http://www.freescale.com/

 

 

 

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Overview: Additional Information

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Document: 1

 

(continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Device / Interface:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EEPROM

CAT93C86 (Die Rev. C) 16-Bit Microwire Serial EEPROM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Catalyst l Semiconductor, Inc.., Doc. No. 1091, Rev. O, 10/13/06)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

http://www.catsemi.com/

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCI

PCI Local Bus Specification

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(PCI Special Interest Group, Revision 2.1 1995)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

http://www.pcisig.com/

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCI9060ES PCI Bus Master Interface Chip for Adapters and Embedded

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Systemsdata sheet

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Mountain View, CA: PLX Technology, Inc., December1995 VERSION 1.2)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

http://www.plxtech.com/

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PMC

Draft Standard for a Common Mezzanine Card Family: CMC P1386/Draft 2.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

April 4, 1995

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(IEEE:New York, NY)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Draft Standard Physical and Environmental Layers for PCI Mezzanine Cards:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PMC P1386.1/Draft 2.0 April 4, 1995

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(IEEE: New York, NY)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

http://www.ieee.org/

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Serial Interface

EIA Subcommittee TR-30.2 on Interface, EIA Standard RS-232-D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Electronic Industries Association, August 1969)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

http://www.eia.org/

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1.Frequently, the most current information regarding addenda/errata for specific documents may be found on the corresponding web site.

10002367-02

PmT1 and PmE1 User’s Manual

1-7

 

 

 

Overview: Additional Information

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1-8

 

 

PmT1 and PmE1 User’s Manual

10002367-02

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Section 2

Setup

This chapter describes the physical layout of the boards, the setup process, and how to check for proper operation once the boards have been installed. This chapter also includes troubleshooting, service, and warranty information.

Caution:

!

ELECTROSTATIC DISCHARGE

Before you begin the setup process, please remember that electrostatic discharge (ESD) can easily damage the components on the PmT1 and PmE1 hardware. Electronic devices, especially those with programmable parts, are susceptible to ESD, which can result in operational failure. Unless you ground yourself properly, static charges can accumulate in your body and cause ESD damage when you touch the board.

Use proper static protection and handle the PmT1 and PmE1 board only when absolutely necessary. Always wear a wriststrap to ground your body before touching a board. Keep your body grounded while handling the board. Hold the board by its edges–do not touch any components or circuits. When the board is not in an enclosure, store it in a staticshielding bag.

To ground yourself, wear a grounding wriststrap. Simply placing the board on top of a staticshielding bag does not provide any protection–place it on a grounded dissipative mat. Do not place the board on metal or other conductive surfaces.

PMT1 AND PME1 CIRCUIT BOARD

The PmT1 and PmE1 circuit board is a PMC module assembly. It uses an eight-layer printed circuit board with the following dimensions:

Table 2-1: Circuit Board Dimensions

Width:

Depth:

Height:

5.86 in. (148.8 mm)

2.913 in. (74.0 mm)

.39 in. (10.0 mm)

 

 

 

The following figures show the front panel and component maps for the PmT1 and PmE1 circuit board.

Figure 2-1: PmT1 and PmE1 Front Panel

TDM B

TDM A

10002367-02

PmT1 and PmE1 User’s Manual

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Setup: PmT1 and PmE1 Circuit Board

Figure 2-2: Component Map, Top (rev. 33)

 

 

 

 

P1

 

 

 

 

 

 

 

 

 

P2

 

 

 

 

 

 

 

F7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

F5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

F1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

F2

F3

F4

 

 

 

 

 

 

 

F8

 

 

F9

U2

U1

 

 

 

 

 

 

 

 

F6

 

 

F11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C1

 

 

 

 

 

 

 

 

S2

 

 

 

 

 

C5

 

C2

 

 

 

 

 

 

 

 

C4

 

 

 

 

C3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

F13 F15

 

R1

C6

S1

U3

 

C9 C7 C8

U4

Y1

 

T1/E1

U101

T1/E1

 

 

 

 

 

C12C13

C14

 

 

 

U7

Y6 Y4

Y3

RN1

 

 

 

 

U5

 

 

R9

 

Y2

R5 R6 R8

R7

U10

U11

C15

C18 C17

 

 

U13

PCI90x0

U18

Y5

Y7

 

U6

 

U12

 

C22

U14

 

R11 R10

C23

 

C24

U15

 

RN2

U17

C26

C27

 

 

 

 

 

 

 

 

 

 

 

C16

 

U8

 

 

U9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L2

 

C19

 

 

 

 

 

 

 

 

L1

C20

 

 

 

 

 

 

 

 

 

 

 

C21

U16

MPC860

X5

R13 R14

R12

 

C25

U100

P11

 

U20

U21

 

U19

 

 

 

 

C29

C28

C10

U22

 

C30

 

 

P12

P14

2-2

PmT1 and PmE1 User’s Manual

10002367-02

 

 

 

Setup: PmT1 and PmE1 Circuit Board

Figure 2-3: Component Map, Bottom (rev. 33)

R19

R18

R26

R22

CR2/CR6 CR5

 

CR8

R31

R25

R29

U25

 

R32

 

 

R30

 

R37

C11

 

 

R38

 

 

C33

 

 

 

 

 

 

R20 CR1/CR4 CR3

 

R21

 

 

 

R27

CR7

 

U24

R24 R23

U23

R28

 

R34

 

 

 

 

 

R35

R36 R33

 

 

R2

 

 

R3

C32 C31

 

 

R4

 

U30 U29

C39 C38

C46

R62

C64 R61 C63 C62 C61

C60

C59

P3

 

 

 

R65

 

 

 

 

 

 

 

C67

R69 R68

 

R15 C68 R71

 

 

R16 R74 R73 R75 R72

R17

U28 U27 U26

C37

C36

 

C35

C34

C43

R40 R39

R41

C45

 

 

 

 

C40

 

 

 

 

 

 

R45

R44

 

 

C44

C42

C41

 

U31

 

R43

R42

 

C47

 

CR9

 

C48

 

 

 

 

 

R52

 

 

R51 R50 R49

R47

 

 

 

 

 

R48

R46

 

R55

 

 

 

 

 

R54

R53

 

R56

 

 

 

 

 

R59 R57

C51

 

 

 

 

C50 C49

 

U32

 

R60 R58

C54

 

 

 

 

 

 

 

 

C53

 

C52

 

 

 

 

CR10

 

 

 

C58

C57

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CR11

 

 

 

 

 

C56

C55

R64

 

 

 

 

C65

 

C66

 

 

 

 

 

 

R63

 

 

 

 

 

 

R67 R70

R66

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

590-

D

10001234-AA

YYYYY

 

10002367-02

PmT1 and PmE1 User’s Manual

2-3

 

 

 

Setup: Installation

Connectors

The PmT1 and PmE1 circuit board has various connectors (see the figures beginning on page 2-2), summarized as follows:

P1/P2: These connectors are installed for the PmT1 front panel I/O configurations. See Chapter 6 for pin assignments.

P3: This is the optional 10-pin BDM JTAG header for viewing processor functions. See Table 3-7 for pin assignments.

P11/P12: These provide a 32-bit PCI interface between the module and the PMC baseboard. Pin assignments are shown in Chapter 7.

P14: This is the I/O connector for the EIA-422 and EIA-232 serial ports. See Chapter 5 for pin assignments.

INSTALLATION

The PmT1 and PmE1 module may be installed in either expansion site on the baseboard. To attach the module to your baseboard, follow these steps:

1Remove the loosely installed screws from the standoffs on the PmT1 and PmE1 module.

2Line up the P11, P12, and P14 connectors and the 5V keying hole with the PMC connectors and the keying pin on the baseboard. Press the module into place, making sure that the connectors are firmly mated and the module front panel is fully seated in the baseboard front panel.

3From the back of the baseboard, insert and tighten the two screws in the standoffs closest to the PMC connectors.

2-4

PmT1 and PmE1 User’s Manual

10002367-02

 

 

 

Setup: PmT1 and PmE1 Setup

Figure 2-4: PmT1 and PmE1 Installation

Voltage key

Tighten these two screws first.

4 Insert and tighten the two remaining screws.

Caution:

!

PMT1 AND PME1 SETUP

You need the following items to set up and check the operation of the Emerson PmT1 and PmE1:

Five-volt compatible PMC baseboard

Chassis and power supply

Serial interface cable for EIA-232 port, Emerson part #C0006322-xx0

Two Compu-shield to RJ45 cable assemblies (Emerson part number C308A009-xx) for front panel I/O configurations

Computer terminal

Save the antistatic bag and box for future shipping or storage.

Do not install the board in a rack or remove the board from a rack while power is applied, at risk of damage to the board.

Power Requirements

The Emerson PmT1 and PmE1 circuit board typically requires 6.7 watts maximum.

10002367-02

PmT1 and PmE1 User’s Manual

2-5

 

 

 

Setup: Reset Methods

Table 2-2: Power Requirements

Volts:

Range (volts):

Maximum Current:

+5

+/- 5%

1.16 A, typical1

1. Running on-card memory test.

The exact power requirements for the PmT1 and PmE1 circuit board depend upon the specific configuration of the board, including the CPU frequency and amount of memory installed on the board. Please contact Emerson Technical Support at 1-800-327-1251 if you have specific questions regarding the board’s power requirements.

Environmental Considerations

As with any printed circuit board, be sure that air flow to the board is adequate. Chassis constraints and other factors greatly affect the air flow rate. The environmental requirements are listed in Table 2-3.

Table 2-3: Environmental Requirements

Environment:

Range:

Relative Humidity:

Operating Temperature

0° to +55° Centigrade, ambient

Not to exceed 95% (non-

 

(at board)

condensing)

 

 

 

Storage Temperature

—40° to 70° Centigrade

Not to exceed 95%

 

 

(non-condensing)

 

 

 

Air Flow

50 linear feet/minute

n/a

 

 

 

RESET METHODS

The entire board is reset on power-up. A baseboard PCI reset causes a PORESET* of the PmT1 and PmE1. The PCI9060ES may be programmed to initiate a software controlled hard reset from the PCI bus.

To do a hard reset of the PmT1 and PmE1 from the local bus, clear and then set bit 16 in the PCI9060ES register at local address C100,00EC16.

To do a hard reset of the PmT1 and PmE1 from the PCI bus, the same bit must be cleared and then set in software. However, the PCI bus is little endian so this bit appears as bit 8 from the (big-endian) point of view of the MPC860P. This means that bit 8 of the register at offset 6C16 from the PCI base address must be cleared and then set. After this reset, the module must be reconfigured on PCI by the baseboard.

TROUBLESHOOTING

In case of difficulty, use this checklist:

2-6

PmT1 and PmE1 User’s Manual

10002367-02

 

 

 

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